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US 2010/0246750 A1Published application
Semiconductor Device and Electronic Device Including Semiconductor Device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHajime KIMURA, Atsushi UMEZAKI
Life of this patent
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Abstract
It is an object to suppress deterioration in characteristics of a transistor in a driver cricuit. A driver circuit includes a first transistor, a second transistor including a gate and one of a source and a drain to which a second signal is inputted, a third transistor whose gate is electrically connected to one of a source and a drain of the first transistor and which controls whether a voltage state of an output signal is set or not by being turned on/off, and a fourth transistor whose gate is electrically connected to the other of the source and the drain of the second transistor and which controls whether a voltage state of an output signal is set or not by being turned on/off.
Claims38
A semiconductor device comprising:
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- and
- a fourth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor are configured to be inputted a first signal,
- wherein the gate and one of the source and the drain of the second transistor are configured to be inputted a second signal,
- wherein the gate of the third transistor is electrically connected to the other of the source and the drain of the first transistor,
- wherein the third transistor is configured to control whether to set a voltage state of an output signal by being turned on and off,
- wherein the gate of the fourth transistor is electrically connected to the other of the source and the drain of the second transistor, and
- wherein the fourth transistor is configured to control whether to set a voltage state of the output signal by being turned on and off.
8 more elements
A semiconductor device comprising:
- a first wiring configured to be inputted a first input signal;
- a second wiring configured to be inputted a second input signal;
- a third wiring configured to be inputted a third input signal;
- a fourth wiring;
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- and
- a fourth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor are electrically connected to the first wiring,
- wherein the gate and one of the source and the drain of the second transistor are electrically connected to the second wiring,
- wherein the gate of the third transistor is electrically connected to the other of the source and the drain of the first transistor,
- wherein one of the source and the drain of the third transistor is electrically connected to the third wiring,
- wherein the gate of the fourth transistor is electrically connected to the other of the source and the drain of the second transistor,
- wherein one of the source and the drain of the fourth transistor is electrically connected to the third wiring,
- wherein the fourth wiring is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor, and
- wherein a voltage which is given to the fourth wiring is a voltage of an output signal.
14 more elements
A semiconductor device comprising:
- a first wiring configured to be inputted a first input signal;
- a second wiring configured to be inputted a second input signal;
- a third wiring configured to be inputted a third input signal;
- a fourth wiring configured to be inputted a fourth input signal;
- a fifth wiring;
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- and
- a fourth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor are electrically connected to the first wiring,
- wherein the gate and one of the source and the drain of the second transistor are electrically connected to the second wiring,
- wherein the gate of the third transistor is electrically connected to the other of the source and the drain of the first transistor,
- wherein one of the source and the drain of the third transistor are electrically connected to the third wiring,
- wherein the gate of the fourth transistor is electrically connected to the other of the source and the drain of the second transistor,
- wherein one of the source and the drain of the fourth transistor is electrically connected to the fourth wiring,
- wherein the fifth wiring is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor, and
- wherein a voltage which is given to the fifth wiring is a voltage of an output signal.
15 more elements
A semiconductor device comprising:
- a first wiring configured to be inputted a first input signal;
- a second wiring configured to be inputted a second input signal;
- a third wiring;
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- and
- a fourth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor are electrically connected to the first wiring,
- wherein the gate and one of the source and the drain of the second transistor are electrically connected to the second wiring,
- wherein the gate and one of the source and the drain of the third transistor are electrically connected to the other of the source and the drain of the first transistor,
- wherein the gate and one of the source and the drain of the fourth transistor are electrically connected to the other of the source and the drain of the second transistor,
- wherein the third wiring is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor, and
- wherein a voltage which is given to the third wiring is a voltage of an output signal.
11 more elements
A semiconductor device comprising:
- a first wiring configured to be inputted a first input signal;
- a second wiring configured to be inputted a second input signal;
- a third wiring;
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a first diode including a positive electrode and a negative electrode;
- and
- a second diode including a positive electrode and a negative electrode,
- wherein the gate and one of the source and the drain of the first transistor are electrically connected to the first wiring,
- wherein the gate and one of the source and the drain of the second transistor are electrically connected to the second wiring,
- wherein the positive electrode of the first diode is electrically connected to the other of the source and the drain of the first transistor,
- wherein the positive electrode of the second diode is electrically connected to the other of the source and the drain of the second transistor,
- wherein the third wiring is electrically connected to the negative electrode of the first diode and the negative electrode of the second diode, and
- wherein a voltage which is given to the third wiring is a voltage of an output signal.
11 more elements
A semiconductor device comprising:
- a shift resister comprising a plurality of flip-flop circuits each comprising:
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- and
- a fourth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor are electrically connected to a first wiring,
- wherein the gate and one of the source and the drain of the second transistor are electrically connected to a second wiring,
- wherein the gate of the third transistor is electrically connected to the other of the source and the drain of the first transistor,
- wherein the gate of the fourth transistor is electrically connected to the other source and the drain of the fourth transistor, and
- wherein the source or the drain of the third transistor and the source or the drain of the fourth transistor are electrically connected to a third wiring.
8 more elements
A semiconductor device comprising:
- a first flip-flop circuit;
- and
- a second flip-flop circuit electrically connected to the first flip-flop circuit,
- wherein the first flip-flop circuit and the second flip-flop circuit each comprising:
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- and
- a fourth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor are electrically connected to a first wiring,
- wherein the gate and one of the source and the drain of the second transistor are electrically connected to a second wiring,
- wherein the gate of the third transistor is electrically connected to the other of the source and the drain of the first transistor,
- wherein the gate of the fourth transistor is electrically connected to the other source and the drain of the fourth transistor, and
- wherein the source or the drain of the third transistor and the source or the drain of the fourth transistor are electrically connected to a third wiring.
11 more elements
A semiconductor device comprising:
- a first flip-flop circuit comprising:
- a first transistor including a gate, a source and a drain;
- a second transistor including a gate, a source and a drain;
- a third transistor including a gate, a source and a drain;
- a fourth transistor including a gate, a source and a drain,
- a fifth transistor including a gate, a source and a drain, and
- a sixth transistor including a gate, a source and a drain,
- wherein the gate and one of the source and the drain of the first transistor is electrically connected to a first wiring,
- wherein the gate and one of the source and the drain of the second transistor is electrically connected to a second wiring,
- wherein the gate of the third transistor and the gate of the fifth transistor are electrically connected to the other of the source and the drain of the first transistor,
- wherein the gate of the fourth transistor and the gate of the sixth transistor are electrically connected to the other source and the drain of the second transistor, and
- wherein the source or the drain of the third transistor and the source or the drain of the fourth transistor are electrically connected to a third wiring,
- a second flip-flop circuit electrically connected to the source or drain of the fifth transistor and the source or the drain of the sixth transistor.
10 more elements
Dependencies are inferred from the claim text.