Method for testing a main memory
AssigneeGrundfos Management A/S
InventorsJohn Bomholt, Flemming Hedegaard, Jorn Skjellerup Rasmussen, Neils Jorgen Strom
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Abstract
A method for testing a working memory which includes a matrix of memory cells, an address bus/address coder and a write circuit/read circuit, consists of two method parts with which in one step, at least a part of the address bus/address coder is tested with regard to address faults and in another step at least a part of the memory cells are tested with regard to cell faults. The testing steps are temporally independent of one another and may thus be effected also during the operation.
Claims18
1-17. (canceled)
A method for testing a working memory, in particular the working memory of a control and regulation electronics of a frequency converter, which comprises at least one matrix of memory cells, means for addressing the memory cell matrix and a write circuit/read circuit, with which in one step, at least a part of the means for addressing is tested with regard to address faults, and in another step at least a part of the memory cells are tested with regard to cell faults, wherein the testing steps are effected independently of one another with regard to time.
Dependencies are inferred from the claim text.