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US 2010/0246275 A1Published application
Methods and apparatus related to a shared memory buffer for variable-sized cells
AssigneeJuniper Networks, Inc.
InventorGunes AYBAY
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Abstract
In one embodiment, an apparatus includes a shared memory buffer including a lead memory bank and a write multiplexing module configured to send a leading segment from a set of segments to the lead memory bank. The set of segments includes bit values from a set of variable-sized cells. The write multiplexing module further configured to send each segment from the set of segments identified as a trailing segment to a portion of the shared memory mutually exclusive from the lead memory bank.
Claims20
An apparatus, comprising:
- a shared memory buffer including a lead memory bank;
- and
- a write multiplexing module configured to send a leading segment from a set of segments to the lead memory bank, the set of segments including bit values from a set of variable-sized cells,
- the write multiplexing module further configured to send each segment from the set of segments identified as a trailing segment to a portion of the shared memory mutually exclusive from the lead memory bank.
1 more element
A method, comprising:
- receiving at a set of registers a segment including bit values from a portion of a cell;
- determining whether a memory bank from a set of memory banks is a write destination of the segment when the segment is a leading segment of the cell, the set of memory banks defining at least a portion of a cut-through buffer;
- and
- shifting the segment from a first position within the set of registers to a second position within the set of registers when a status of a write port of the memory bank is an unavailable status.
1 more element
An apparatus, comprising:
- a multi-stage switch fabric configured to route a set of variable-sized cells having bit-wise widths within a range of bit-wise widths;
- a shared memory buffer within a stage of the multi-stage switch fabric, the shared memory buffer having a set of memory banks;
- and
- a control module configured to trigger distribution of a set of segments including bit values from the set of variable-sized cells to the set of memory banks, each segment from the set of segments having a bit-wise width less than a minimum bit-wise width from the range of bit-wise widths associated with the variable-sized cells.
1 more element
Dependencies are inferred from the claim text.