Apparatus comparing verified data to original data in the programming of a memory array

A memory system comprising:

• a controller for controlling the system;
• and
• a non-volatile memory device, coupled to the controller, the memory device comprising:
• a memory array having a plurality of non-volatile memory cells coupled to word lines and bit lines;
• a plurality of cache registers for inhibiting programming of a column of memory cells, each cache register coupled to a pair of bit lines;
• a plurality of data caches for storing data to be programmed, each data cache coupled to the pair of bit lines;
• and
• a memory controller circuit coupled to the memory array, the controller circuit adapted to execute a method for programming the plurality of memory cells such that the controller circuit generates a series of program and verify pulses to program original data into a row of memory cells, set each respective cache register in response to a successful verification, performs a verification operation to determine verified data, and performs a post-programming program operation on the row of memory cells if the verified data is different from the original data.

A memory device comprising:

• a control circuitry;
• and
• a memory array;
• wherein the control circuitry is configured to perform a programming operation on at least one memory cell of the memory array in response to original data, and further configured to perform a comparison of verified data of the at least one memory cell of the memory array to the original data following success of the programming operation.