Semiconductor memory having both volatile and non-volatile functionality and method of operating

A semiconductor memory cell comprising:

• a floating body region configured to be charged to a level indicative of a state of the memory cell to store the state as volatile memory;
• a first region in electrical contact with said floating body region;
• a second region in electrical contact with said floating body region and spaced apart from said first region;
• a floating gate or trapping layer positioned between said first and second regions and configured to receive transfer of data stored as said volatile memory and store said data as nonvolatile memory indicative of said state of the memory cell;
• a base region in electrical contact with said floating body region;
• and
• a control gate positioned above the floating gate or trapping layer.

A method of operating a memory cell having a floating body for storing data as volatile memory and a floating gate or trapping layer for storing data as non-volatile memory, the method comprising:

• upon initial application of power to the cell, placing said cell in an initial state comprising a volatile operational mode;
• setting the non-volatile memory to a predetermined state;
• and
• operating said cell as volatile memory.

A method of operating a semiconductor storage device comprising a plurality of memory cells each having a floating body for storing data as volatile memory and a floating gate or trapping layer for storing data as non-volatile memory, the method comprising:

• upon initial application of power to the device, placing said cells in an initial state comprising a volatile operational mode;
• setting the non-volatile memory of each of said cells to a predetermined state;
• and
• operating said cells as volatile memory.