US 2010/0246242 A1 · Soft Error Robust Storage SRAM Cells and Flip-Flops

Abstract

A storage cell is provided with improved robustness to soft errors. The storage cell comprises complementary lower storage nodes and complementary upper storage nodes. The upper storage nodes act to limit feedback between the lower storage nodes and are capable of restoring the logical state of the core storage nodes in the event of a soft error. Similarly the lower storage nodes act to limit feedback between the upper storage nodes with the same effect. An SRAM cell utilizing the proposed storage cell can be realized with two access transistors configured to selectively couple complementary storage nodes to a corresponding bitline. A flip-flop can be realized with a variety of transfer gates which selectively couple data into the proposed storage cell.

Claims11

Dependent claims

1) A storage cell configuration comprising:

first and second lower storage nodes configured to store complementary voltages;
two corresponding upper storage nodes capable of limiting feedback between the first and second lower storage nodes and restoring the original value on first or second lower storage nodes in the case of a soft error;
drive transistors configured to selectively couple the lower storage nodes to ground;
and
load transistors configured to selectively couple the upper storage nodes to a power supply;
and
inner transistors configured to selectively couple the lower storage nodes to the upper storage nodes;
and
restorative transistors configured to selectively couple the lower storage nodes to a power supply;

6 more elements

Dependencies are inferred from the claim text.

Facts

Application

12/749,857Filed 30 Mar 2010

Priority

30 Mar 2009

Published

30 Sep 2010

Term ends

Not estimatedThe source records don’t support an estimate.

Classification6 codes

G11C 11/4125
Using field-effect transistors only: cells incorporating circuit means for protecting against loss of information
G11C 11/413
Forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt…
H03K 3/356165
Using complementary field-effect transistors: using additional transistors in the feedback circuit
H03K 3/356182
Using complementary field-effect transistors: with additional means for controlling the main nodes

Soft Error Robust Storage SRAM Cells and Flip-Flops

Life of this patent

Soft Error Robust Storage SRAM Cells and Flip-Flops

Life of this patent

Abstract

Claims11