A method for producing a liquid crystal panel including an active matrix substrate including:
- scanning signal lines extending in a first direction;
- data signal lines extending in a second direction;
- a plurality of storage capacitor lines extending in the first direction;
- pixel electrodes in pixel areas each crossed by one scanning signal line, each of the pixel areas including at least one pixel electrode provided on one side of the one scanning signal line and at least one pixel electrode provided on another side of the one scanning signal line, the each pixel area being crossed by one storage capacitor line on one side of the one scanning signal line and by another storage capacitor line on another side of the scanning signal line,
- the method comprising the steps of:
- forming storage capacitor line extended sections each extending from a position on a storage capacitor line between an intersection of the storage capacitor line and one of two adjacent data signal lines and an intersection of the storage capacitor line and another one of the two adjacent data signal lines, in a manner such that each of the storage capacitor line extended sections includes a section that does not overlap a pixel electrode and that a storage capacitor line extended section extending from one of two adjacent storage capacitor lines that sandwich no scanning signal line and being positioned in a space between the two adjacent data signal lines is connected with another storage capacitor line extended section extending from another one of the two adjacent storage capacitor lines and positioned in the space;
- on an assumption that one of two storage capacitor lines adjacent to a predetermined scanning signal line is an adjacent storage capacitor line and that one of two scanning signal lines adjacent to the predetermined scanning signal line is an adjacent scanning signal line, the one scanning signal line being positioned on a same side as the adjacent storage capacitor line, forming data signal line extended sections each extending from a position on a data signal line between an intersection of the data signal line and the predeteiuiined scanning signal line and an intersection of the data signal line and the adjacent storage capacitor line, in a manner such that a part of each of the data signal line extended sections overlaps the predetermined scanning signal line;
- in a case where a disconnection occurs in the predetermined scanning signal line, on an assumption that two data signal lines sandwiching a position of the disconnection are a first data signal line and a second data signal line and that a data signal line extended section extending from the first data signal line is a first data signal line extended section and a data signal line extended section extending from the second data signal line is a second data signal line extended section, (i) cutting the first data signal line at a position between an intersection of the first data signal line and the predetermined scanning signal line and an intersection of the first data signal line and the adjacent storage capacitor line and at a position between an intersection of the first data signal line and the adjacent storage capacitor line and an intersection of the first data signal line and the adjacent scanning signal line and (ii) cutting the second data signal line at a position between an intersection of the second data signal line and the predetermined scanning signal line and an intersection of the second data signal line and the adjacent storage capacitor line and at a position between an intersection of the second data signal line and the adjacent storage capacitor line and an intersection of the second data signal line and the adjacent scanning signal line;
- (i) cutting off a portion of the adjacent storage capacitor line from an intersection of the adjacent storage capacitor line and the first data signal line to an intersection of the adjacent storage capacitor line and the second data signal line, and (ii) cutting a storage capacitor line extended section extending from the adjacent storage capacitor line at a position that does not overlap a pixel electrode;
- (i) melt-connecting the first data signal line extended section and the predetermined scanning signal line at a position where the first data signal line extended section overlaps the predetermined scanning signal line and (ii) melt-connecting the second data signal line extended section and the predetermined scanning signal line at a position where the second data signal line extended section overlaps the predetermined scanning signal line;
- and
- (i) melt-connecting the first data signal line and the adjacent storage capacitor line at an intersection of the first data signal line and the adjacent storage capacitor line and (ii) melt-connecting the second data signal line and the adjacent storage capacitor line at an intersection of the second data signal line and the adjacent storage capacitor line.