Receiving apparatus, receiving method, program, and receiving system

A receiving method for use with a receiving apparatus including a deinterleaving device configured to perform a deinterleaving process on an LDPC-coded data signal having undergone an interleaving process, said LDPC representing Low Density Parity Check, by use of a memory which has columns capable of storing as many as “a” data, said “a” being an integer of at least 1, said receiving method comprising the steps of:

• if said data signal is supplied in units of N data, said N being an integer smaller than said “a,” then controlling said deinterleaving device to write said data signal to a predetermined address of said memory while reading previously written data from said predetermined address in a write period;
• and
• controlling said deinterleaving device to stop writing said data signal to said predetermined address of said memory while reading said previously written data from said predetermined address in a write inhibit period.

A program for use on a computer controlling a receiving apparatus including a deinterleaving device configured to perform a deinterleaving process on an LDPC-coded data signal having undergone an interleaving process, said LDPC representing Low Density Parity Check, by use of a memory which has columns capable of storing as many as “a” data, said “a” being an integer of at least 1, said program causing said computer to perform a control process comprising the steps of:

• if said data signal is supplied to said receiving apparatus in units of N data, said N being an integer smaller than said “a,” then controlling said deinterleaving device to write said data signal to a predetermined address of said memory while reading previously written data from said predetermined address in a write period;
• and
• controlling said deinterleaving device to stop writing said data signal to said predetermined address while reading said previously written data from said predetermined address in a write inhibit period.

A receiving apparatus comprising:

• deinterleaving means for performing a deinterleaving process on an LDPC-coded data signal having undergone an interleaving process, said LDPC representing Low Density Parity Check, by use of a memory which has columns capable of storing as many as “a” data, said “a” being an integer of at least 1;
• and
• control means for, if said data signal is supplied in units of N data, said N being an integer smaller than said “a,” controlling said deinterleaving means to write said data signal to a predetermined address of said memory while reading previously written data from said predetermined address in a write period, controlling said deinterleaving means to stop writing said data signal to said predetermined address of said memory while reading said previously written data from said predetermined address in a write inhibit period.