Driving circuit and driving method for liquid crystal display
AssigneeBeijing Boe Optoelectronics Technology Co., Ltd.
InventorLiang ZHANG
Life of this patent
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Abstract
A driving circuit and driving method for liquid crystal display is disclosed. The driving circuit comprises a time sequence controller, a first data driving chip and a second data driving chip connected to the time sequence controller, and a reference voltage buffer connected to the first data driving chip and the second data driving chip respectively. The two data driving chips output a pixel voltage signal of positive polarity and a pixel voltage signal of negative polarity to a liquid crystal display panel respectively.
Claims10
A driving circuit for liquid crystal display, comprising a time sequence controller, a first data driving chip and a second data driving chip connected to the time sequence controller, and a reference voltage buffer connected to the first data driving chip and the second data driving chip respectively, wherein
- the time sequence controller is used to decode a received low voltage differential signal to generate a data display signal and a time sequence control signal, divide the data display signal into a first data display signal and a second data display signal according to the time sequence control signal, transmit the first data display signal to the first data driving chip, transmit the second data display signal to the second data driving chip, and transmit the time sequence control signal to the first data driving chip and the second data driving chip respectively;
- the reference voltage buffer is used to generate a first reference voltage and a second reference voltage, provide the first reference voltage to the first data driving chip, and provide the second reference voltage to the second data driving chip;
- and
- the first data driving chip and the second data driving chip alternately drive a same pixel of a liquid crystal display panel at intervals of a frame;
- the first data driving chip is used to perform processing on the first data display signal according to the first reference voltage and the time sequence control signal to generate and output a pixel voltage signal of negative polarity to the liquid crystal display panel;
- the second data driving chip is used to perform processing on the second data display signal according to the second reference voltage and the time sequence control signal to generate and output a pixel voltage signal of positive polarity to the liquid crystal display panel;
- the pixel voltage signal of negative polarity is lower than a common voltage signal of the liquid crystal display panel, and the pixel voltage signal of positive polarity is higher than the common voltage signal of the liquid crystal display panel.
A driving method for liquid crystal display, comprising:
- step 1:
- a time sequence controller decoding a received low voltage differential signal to generate a data display signal and a time sequence control signal;
- step 2:
- the time sequence controller dividing the data display signal into a first data display signal and a second data display signal according to the time sequence control signal, transmitting the first data display signal to the first data driving chip, transmitting the second data display signal to the second data driving chip, and transmitting the time sequence control signal to the first data driving chip and the second data driving chip respectively;
- and
- step 3:
- the first data driving chip and the second data driving chip alternately driving a same pixel of a liquid crystal display panel at intervals of a frame, the first data driving chip performing processing on the first data display signal according to a first reference voltage provided by a reference voltage buffer and the time sequence control signal to generate and output a pixel voltage signal of negative polarity to the liquid crystal display panel, the second data driving chip performing processing on the second data display signal according to the second reference voltage provided by the reference voltage buffer and the time sequence control signal to generate and output a pixel voltage signal of positive polarity to the liquid crystal display panel, wherein the pixel voltage signal of negative polarity is lower than a common voltage signal of the liquid crystal display panel, and the pixel voltage signal of positive polarity is higher than the common voltage signal of the liquid crystal display panel.
Dependencies are inferred from the claim text.