Display pannel

Abstract

A display panel is disclosed has a plurality of source data lines and at least one first gate scan line and includes at least one first display row and at least one second display row. The first display row includes a plurality of first pixel units, and each of the first pixel units includes a first driving transistor. Gates of the first driving transistors are commonly coupled to the first gate scan line, and first sources/drains of the first driving transistors are sequentially coupled to odd columns of the source data lines. Moreover, the second display row includes a plurality of second pixel units, and each of the second pixel units includes a second driving transistor. Gates of the second driving transistors are commonly coupled to the first gate scan line, and first sources/drains of the second driving transistors are sequentially coupled to even columns of the source data lines.

Dependencies are inferred from the claim text.