Back to results
US 2010/0245145 A1Published application
Un-buffered segmented r-dac with switch current reduction
AssigneeIntersil Americas Inc.
InventorAli Motamed
Life of this patent
Estimating the term…
Abstract
An resistor string digital-to-analog converter (DAC) that includes elements to compensate for resistor ladder loading, and/or to provide compensation for loading such as via switch current cancellation. The approach reduces output voltage sensitivity to switch resistances while also reducing INL and DNL errors. Additional resistor loops are optionally disposed at the top and bottom of one or more further segments to provide Nth order resistive current cancellation.
Claims23
An apparatus comprising:
- a first resistor segment having a plurality of sub-segments, each sub-segment comprising one or more resistor elements;
- a second resistor segment having a plurality of sub-segments, each sub-segment comprising one or more resistor elements;
- a plurality of switches interconnecting the sub-segments of the first and second segments;
- and
- at least one sub-segment having an upper additional resistor element and a lower additional resistor element, the upper additional resistor element being disposed between a first switch and a first adjacent sub-segment, and the lower additional resistor element being disposed between a second one of the switches and a second adjacent sub-segment.
2 more elements
A method comprising:
- operating one or more switches disposed between a first resistor segment and a second resistor segment, the first resistor segment comprising a plurality of sub-segments each comprising two or more resistor elements, and the second resistor segment comprising a second plurality of sub-segments, each comprising two or more resistor elements;
- and
- compensating for loading of the second resistor segment on the first resistor segment.
Dependencies are inferred from the claim text.