Oscillator circuit
AssigneeNEC Corporation
InventorsAkira Tanabe, Naoya Inoue
Life of this patent
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Abstract
A first wiring layer and a plurality of second wiring layers having a thickness smaller than the first wiring layer are stacked on the semiconductor substrate. An oscillator circuit has an inductor formed by the plurality of second wiring layers. The inductor oscillates at a frequency at which the inductor and a parasitic capacitance of an inverter circuit resonate. A drain of an n-type MISFET and a drain of a p-type MISFET of the inverter circuit are connected to each other, and an output of the inductor is connected to a connection point of those drains.
Claims14
An on-chip oscillator circuit mounted on a semiconductor substrate, wherein a first wiring layer and a plurality of second wiring layers having a thickness smaller than the first wiring layer are stacked on the semiconductor substrate;
- wherein the oscillator circuit comprises:
- an inductor formed by the plurality of second wiring layers, and
- an inverter circuit including an n-type MISFET and a p-type MISFET;
- wherein the inductor is connected to the inverter circuit so as to operate as a load on the inverter circuit;
- wherein the inductor is operable to oscillate at a frequency at which the inductor and a parasitic capacitance of the inverter circuit resonate;
- wherein a drain of the n-type MISFET and a drain of the p-type MISFET are connected to each other, and an output of the inductor is connected to a connection point of those drains.
Dependencies are inferred from the claim text.