Semiconductor device and its manufacture method
AssigneeFujitsu Semiconductor Limited
InventorsMasashi Shima, Kazukiyo Joshin, Toshihide Suzuki
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Abstract
A semiconductor device has: a low concentration drain region creeping under a gate electrode of a MIS type transistor; a high concentration drain region having an impurity concentration higher than the low concentration drain region and formed in the low concentration drain region spaced apart from the gate electrode; and an opposite conductivity type region of a conductivity type opposite to the drain region formed in the low concentration drain region on a surface area between the high concentration drain region and the gate electrode, the opposite conductivity type region and low concentration drain region forming a pn junction.
Claims13
A semiconductor device comprising:
- a semiconductor substrate having a first region of a first conductivity type;
- a gate insulating film formed on said first region;
- a gate electrode formed on said gate insulating film;
- a source region of a second conductivity type opposite to said first conductivity type formed in said first region on one side of said gate electrode;
- a low concentration drain region of said second conductivity type, formed in said first region on another side of said gate electrode, an end of said drain region on a side of said source region creeping under said gate electrode;
- a high concentration drain region of said second conductivity type formed in said low concentration drain region and spaced apart from said gate electrode, said high concentration drain region having an impurity concentration higher than said low concentration region;
- and
- an opposite conductivity type region of said first conductivity type formed in said low concentration drain region on a surface region between said high concentration drain region and said gate electrode, said opposite conductivity type region and said low concentration drain region forming a pn junction.
A semiconductor device manufacture method comprising:
- preparing a semiconductor substrate having a first region of a first conductivity type;
- forming a low concentration drain region of a second conductivity type opposite to said first conductivity type in said first region;
- forming a gate insulating film on said first region and said low concentration drain region;
- forming a gate electrode on said first gate insulating film, said gate electrode having an overlap with both said first region and said low concentration drain region;
- forming an opposite conductivity type region of said first conductivity type by implanting impurities for determining said first conductivity type into a surface layer of said low concentration drain region;
- forming an insulating film above said low concentration drain region, said insulating film covering a side wall of said gate electrode on a side of said low concentration drain region and extending to a partial area above said opposite conductivity type region;
- forming a high concentration drain region of said second conductivity type having an impurity concentration higher than said low concentration drain region, by using said insulating film as a mask and implanting impurities for determining said second conductivity into said opposite conductivity type region and an underlying region of said low concentration drain region;
- and
- forming a source region of said second conductivity type in said first region on a side of said low concentration region opposite to said gate electrode.
Dependencies are inferred from the claim text.