Soft error and transient error detection device and methods therefor

A device comprising:

• a data input to receive a data signal;
• a clock input to receive a clock signal to latch information based on the data signal;
• a first signal path including the data input and a first latch, the first signal path having a first delay between the data input and a first data node for a given transition at the data input;
• and
• a second signal path including the data input and a second latch, the second signal path including a first data node at a same location relative to the second latch as the first data node of the first signal path is located relative to the first latch, the second signal path having a second delay between the data input and the first node of the second signal path for the given transition, the second delay being substantially different that the first delay.

A method comprising:

• receiving a signal transition at a data node of a latch module;
• providing a first representation of the signal transition to a source/drain of a first transistor at a first time;
• providing a second representation of the signal transition to a source/drain of a second transistor at a second time;
• receiving, at a third time, an initial portion of the clock transition at a gate of a first transistor to latch information at a first storage node of the latch module;
• and
• receiving, at substantially the third time, the initial portion of the clock transition at a gate of a second transistor to latch information at a second storage node of the latch module.