Pll burn-in circuit and semiconductor integrated circuit
OwnerYuji Yamada, Masayoshi Kinoshita +2inventors
InventorsYuji Yamada, Masayoshi Kinoshita, Kazuaki Sogawa, Junji Nakatsuka
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OwnerYuji Yamada, Masayoshi Kinoshita +2inventors
InventorsYuji Yamada, Masayoshi Kinoshita, Kazuaki Sogawa, Junji Nakatsuka
Estimating the term…
In a PLL which does not include a loop filter, an additional circuit for subjecting a voltage-controlled oscillator to a burn-in test with an appropriate oscillation frequency is realized by a less circuit configuration. A gate terminal of a diode-connected transistor (13) which has the same polarity as a voltage-to-current conversion transistor (11) in a voltage-controlled oscillator (10) is connected to a gate terminal of the transistor (11) through a switch (12a), and a current supply (14) is connected to a drain terminal of the transistor (13). By appropriately controlling the current value supplied from the current supply (14) and the size ratio between the transistor (11) and the transistor (13), a current required for performing a burn-in test can be supplied to a ring oscillator in the voltage-controlled oscillator (10).
A PLL burn-in circuit which applies a burn-in voltage to a voltage-to-current conversion transistor for converting a voltage applied to its gate terminal into a current, said transistor being included in a voltage-controlled oscillator which constitutes a phase locked loop circuit (hereinafter referred to as a PLL) embedded in a semiconductor integrated circuit, said PLL burn-in circuit comprising:
A semiconductor integrated circuit comprising:
Dependencies are inferred from the claim text.