Semiconductor device
AssigneeNEC Corporation
InventorsShintaro Yamamichi, Kentaro Mori, Hideya Murai
Life of this patent
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Abstract
A semiconductor device comprises: a semiconductor element; a support substrate arranged on a surface of the semiconductor element opposite to a surface thereof provided with a pad, the support substrate being wider in area than the semiconductor element; a burying insulating layer on the support substrate for burying the semiconductor element therein; a fan-out interconnection led out from the pad to an area on the burying insulating layer lying more peripherally outwardly than the semiconductor element; and a reinforcement portion arranged in a preset area on top of outer periphery of the semiconductor element for augmenting the mechanical strength of the burying insulating layer and the fan-out interconnection.
Claims21
A semiconductor device comprising:
- a semiconductor element;
- a support substrate arranged on a surface of said semiconductor element opposite to a surface thereof provided with a pad, said support substrate being wider in area than said semiconductor element;
- a burying insulating layer on said support substrate for burying said semiconductor element therein;
- a fan-out interconnection led out from said pad to an area on said burying insulating layer lying more peripherally outwardly than said semiconductor element;
- and
- a reinforcement portion arranged in a preset area on top of outer periphery of said semiconductor element for augmenting the mechanical strength of said burying insulating layer and said fan-out interconnection.
A semiconductor device comprising:
- a semiconductor element;
- a support substrate arranged on a surface of said semiconductor element opposite to a surface thereof provided with a pad;
- said support substrate being wider in area than said semiconductor element;
- a burying insulating layer on said support substrate for burying said semiconductor element therein;
- a fan-out interconnection led out from said pad to an area on said burying insulating layer extending to an area lying more peripherally outwardly than said semiconductor element;
- and
- a reinforcement portion via interconnection connected to at least one end of said semiconductor element without being connected to said fan-out interconnection.
17-21. (canceled)
Dependencies are inferred from the claim text.