# US 2010/0244206 A1 · Method and structure for threshold voltage control and drive current improvement for high-k metal gate transistors

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- Number: US 2010/0244206 A1
- Document ID: US20100244206A1
- Status: Published application
- Kind: A1
- Application number: 12/414,794
- Filed: 2009-03-31
- Published: 2010-09-30
- Earliest claimed: 2009-03-31
- Assignees: International Business Machines Corporation
- Inventors: Huiming Bu; Michael P. Chudzik; Wei He; Rashmi Jha; Young-Hee Kim; Siddarth A. Krishnan; Renee T. Mo; Naim Moumen; Wesley C. Natzle
- Web page: https://patentgrep.com/patent/US20100244206A1

## CPC

- H10D 64/01344: {in a nitrogen-containing ambient, e.g. N2O oxidation}
- H10D 64/01338: {with a treatment, e.g. annealing, after the formation of the conductor}
- H10D 64/0134: {with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor}
- H10D 64/665: {the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum (having lateral variation H10D64/671)}
- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method of forming a device includes providing a substrate, forming an interfacial layer on the substrate, depositing a high-k dielectric layer on the interfacial layer, depositing an oxygen scavenging layer on the high-k dielectric layer and performing an anneal. A high-k metal gate transistor includes a substrate, an interfacial layer on the substrate, a high-k dielectric layer on the interfacial layer and an oxygen scavenging layer on the high-k dielectric layer.

## Claims

### Claim 1

A method of forming a device, comprising:
providing a substrate;
forming an interfacial layer on the substrate;
depositing a high-k dielectric layer on the interfacial layer;
depositing an oxygen scavenging layer on the high-k dielectric layer; and
performing an anneal.

### Claim 2 (depends on 1)

A method according to claim 1, wherein the interfacial layer is formed by plasma nitridation

### Claim 3 (depends on 1)

A method according to claim 1, wherein the interfacial layer is formed by thermal nitridation.

### Claim 4 (depends on 1)

A method according to claim 1, wherein the interfacial layer is selected from the group consisting of: oxide, nitride, oxynitride and nitrided oxide.

### Claim 5 (depends on 1)

A method according to claim 1, wherein the interfacial layer has a thickness of approximately 3 Å to 20 Å.

### Claim 6 (depends on 1)

A method according to claim 1, wherein the nitrogen dose in the interfacial layer is approximately 2E14 to 3E15 at/cm2.

### Claim 7 (depends on 1)

A method according to claim 1, wherein the high-k dielectric layer is deposited by CVD or ALD as a gate dielectric.

### Claim 8 (depends on 7)

A method according to claim 7, wherein the high-k dielectric layer is selected from the group consisting of: hafnium oxide (HfO2), hafnium silicon oxynitride (HfSiON), tantalum oxide (Ta2O5), aluminum oxide (Al2O3), zirconium oxide (ZrO2) and titanium oxide (TiO2).

### Claim 9 (depends on 8)

A method according to claim 8, wherein the high-k dielectric layer has a thickness of approximately 10 Å to 60 Å.

### Claim 10 (depends on 1)

A method according to claim 1, wherein the oxygen scavenging layer is selected from the group consisting of: lanthanide metal, rare earth metal, titanium rich (Ti-rich) titanium nitride (TiN), Group 2 elements and Group 3 elements.

### Claim 11 (depends on 1)

A method according to claim 1, wherein the annealing step is performed at a temperature of approximately 900° C. or greater.

### Claim 12 (depends on 1)

A method according to claim 1, wherein gate formation occurs before the annealing step.

### Claim 13 (depends on 12)

A method according to claim 12, wherein the annealing step includes performing a first anneal before gate formation and performing a second anneal after gate formation.

### Claim 14

A method of forming a device, comprising:
providing a substrate;
forming a base oxide layer on the substrate;
forming an interfacial layer on the substrate;
depositing a high-k dielectric layer on the interfacial layer;
depositing an oxygen scavenging layer on the high-k dielectric layer; and
performing an anneal.

### Claim 15 (depends on 14)

A method according to claim 14, wherein the interfacial layer is deposited by plasma nitridation.

### Claim 16 (depends on 14)

A method according to claim 14, wherein the interfacial layer is deposited by thermal nitridation.

### Claim 17 (depends on 4)

A method according to claim 4, wherein the interfacial layer is selected from the group consisting of: oxide, nitride, oxynitride and nitrided oxide.

### Claim 18 (depends on 4)

A method according to claim 4, wherein the base oxide layer has a thickness of approximately 3 Å to 20 Å.

### Claim 19

A structure, comprising:
a substrate;
an interfacial layer on the substrate;
a high-k dielectric layer on the interfacial layer; and
an oxygen scavenging layer on the high-k dielectric layer.

### Claim 20 (depends on 19)

A structure according to claim 19, wherein the interfacial layer is formed by plasma nitridation or thermal nitridation.

### Claim 21 (depends on 20)

A structure according to claim 20, wherein the interfacial layer is selected from the group consisting of: oxide, nitride, oxynitride and nitrided oxide.

### Claim 22 (depends on 19)

A structure according to claim 19, wherein the nitrogen dose in the interfacial layer is approximately 2E14 to 3E15 at/cm2.

### Claim 23 (depends on 19)

A structure according to claim 19, wherein the high-k dielectric layer is selected from the group consisting of: hafnium oxide (HfO2), hafnium silicon oxynitride (HfSiON), tantalum oxide (Ta2O5), aluminum oxide (Al2O3), zirconium oxide (ZrO2) and titanium oxide (TiO2).

### Claim 24 (depends on 19)

A structure according to claim 19, wherein the oxygen scavenging layer is selected from the group consisting of: lanthanide metal, rare earth metal, titanium rich (Ti-rich) titanium nitride (TiN), Group 2 elements and Group 3 elements.

### Claim 25 (depends on 19)

A structure according to claim 19, wherein the interfacial layer has a thickness of approximately 3 Å to 20 Å, the high-k dielectric layer has a thickness of approximately 10 Å to 60 Å and the oxygen scavenging layer has a thickness of approximately 1 Å to 20 Å.