Method of fabricating spacers in a strained semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Pin Hsu, Kong-Beng Thei, Harry Chuang
Life of this patent
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Abstract
The present disclosure provides a method for fabricating a semiconductor device that includes forming a gate stack over a silicon substrate, forming dummy spacers on sidewalls of the gate stack, isotropically etching the silicon substrate to form recess regions on either side of the gate stack, forming a semiconductor material in the recess regions, the semiconductor material being different from the silicon substrate, removing the dummy spacers, forming spacer layers having an oxide-nitride-oxide configuration over the gate stack and the semiconductor material, and etching the spacer layers to form gate spacers on the sidewalls of the gate stack.
Claims20
A method of fabricating a semiconductor device, comprising:
- providing a silicon substrate having a shallow trench isolation (STI) formed thereon;
- forming a gate stack over the silicon substrate;
- forming dummy spacers on sidewalls of the gate stack;
- forming a recess region in the silicon substrate, wherein the recess region is interposed between the gate stack and the shallow trench isolation;
- epi-growing a semiconductor material in the recess region, wherein the semiconductor material is different from the silicon substrate;
- removing the dummy spacers;
- forming a first silicon oxide layer over the gate stack and the semiconductor material;
- forming a silicon nitride layer over the first silicon oxide layer;
- forming a second silicon oxide layer over the silicon nitride layer;
- performing a first dry etching process to remove a portion of the second silicon oxide layer;
- performing a second dry etching process to remove a portion of the silicon nitride layer;
- and
- performing a third dry etching process to remove a portion of the first silicon oxide layer thereby forming gate spacers on the sidewalls of the gate stack, wherein each gate spacer includes a remaining portion of the first silicon oxide layer, the silicon nitride layer, and the second silicon oxide layer.
A method of fabricating a semiconductor device, comprising:
- forming a gate stack over a silicon substrate;
- forming dummy spacers on sidewalls of the gate stack;
- isotropically etching the silicon substrate to form recess regions on either side of the gate stack;
- forming a semiconductor material in the recess regions, wherein the semiconductor material is different from the silicon substrate;
- removing the dummy spacers;
- forming a plurality of spacer layers having an oxide-nitride-oxide configuration over the gate stack and the semiconductor material;
- and
- etching the spacer layers to form gate spacers on the sidewalls of the gate stack.
A semiconductor device, comprising:
- a silicon substrate having a silicon region, strained semiconductor material regions, and a shallow trench isolation region, wherein one of the strained semiconductor material regions is interposed between the silicon region and the shallow trench isolation region, and wherein the strained semiconductor material regions include an isotropic profile;
- and
- a transistor including:
- a gate stack formed over the silicon region;
- spacers formed on sidewalls of the gate stack, wherein each spacer includes a nitride layer sandwiched between a first oxide layer and a second oxide layer;
- and
- lightly doped source/drain (LDD) regions each formed in a portion of the silicon region underneath the spacer and in a portion of the strained semiconductor material region.
Dependencies are inferred from the claim text.