Semiconductor Structure of a Display Device and Method for Fabricating the Same

A semiconductor structure of display device, comprising:

• a substrate with a thin film transistor region and a pixel capacitor region;
• a thin film transistor, a source electrode plug and a drain electrode plug formed on the thin film transistor region of the substrate, wherein the thin film transistor comprises a gate electrode, a source electrode, a drain electrode, a channel, and a gate dielectric layer, and the source electrode plug and the drain electrode plug electrically connected to the source electrode and the drain electrode, respectively;
• a pixel capacitor is formed on the pixel capacitor region of the substrate, wherein the pixel capacitor comprises:
• a bottom electrode formed on a bottom dielectric layer;
• a semiconductor layer on the substrate, directly under the bottom electrode, the semiconductor layer being electrically connected to the drain electrode;
• an interlayer dielectric layer formed on the substrate and the bottom electrode;
• a top electrode formed on the interlayer dielectric layer, wherein the top electrode electrically connected to the bottom electrode;
• a capacitor dielectric layer is formed on the substrate and the top electrode;
• and
• a transparent electrode formed on the capacitor dielectric layer over the top electrode and electrically connected to the drain electrode plug.

A pixel structure, comprising:

• a semiconductor layer formed on a substrate;
• a bottom dielectric layer formed on the semiconductor layer;
• a bottom electrode formed on the bottom dielectric layer;
• an interlayer dielectric layer formed on the bottom electrode;
• a top electrode formed on the dielectric layer and electrically connected to the bottom electrode via a first plug, wherein the first plug passes through the interlayer dielectric layer;
• a capacitor dielectric layer formed on the top electrode;
• a planarization layer formed on the capacitor dielectric layer and an opening exposing the capacitor dielectric layer directly over the top electrode;
• and
• a transparent electrode formed on the capacitor dielectric layer directly over the top electrode, wherein the transparent electrode electrically connects to the semiconductor layer via a second plug.