Quasi-vertical light emitting diode

A method of making quasi-vertical light emitting devices, the method comprising:

• providing a sapphire substrate;
• growing a plurality of semiconductor layers on the sapphire substrate, the plurality of semiconductor layers including an n-GaN layer, an active layer, and a p-GaN layer;
• etching the plurality of semiconductor layers to produce device isolation trenches forming a plurality of separable semiconductor devices;
• etching the plurality of semiconductor layers to provide at least one hole in the plurality of semiconductor layers, the at least one hole etched to the sapphire substrate;
• etching an n-mesa in the active layer and the p-GaN layer;
• drilling at least one blind hole in the sapphire substrate at the location of the at least one hole in the plurality of semiconductor layer, the at least one sapphire hole drilled to a predetermined depth, wherein the drilling defines blind hole walls in each of the at least one blind hole;
• depositing a p-metal on the p-GaN layer;
• depositing an n-metal in the n-mesa;
• depositing an n-metal along the blind hole walls;
• plating the at least one blind hole with an n-electrode metal;
• filling each of the at least one blind hole to form an n-electrode contact;
• growing a passivation layer over all n metals;
• applying a p-electrode to the p-metal;
• thinning the sapphire substrate to expose the n-electrode contact;
• and
• dicing along the device isolation trenches to form a plurality of semiconductor devices.

A quasi-vertical light emitting device comprising:

• a sapphire substrate;
• a plurality of semiconductor layers grown on the sapphire substrate, the plurality of semiconductor layers including an n-GaN layer, an active layer, and a p-GaN layer;
• a plurality of holes etched in the plurality of semiconductor layers, each of the plurality of holes etched to the sapphire substrate, and a plurality of sapphire holes in the sapphire substrate, each of the plurality of holes aligned with one of the plurality of sapphire holes to form hole walls, the hole walls plated with an n-metal and each of the plurality of holes filled with an n-metal to form an n-electrode contact;
• an n-mesa in the active layer and the p-GaN layer, the n-mesa plated with an n-metal and a passivation layer grown over the n-metals;
• and
• a p-metal layer deposited on the p-GaN layer, and a p-electrode bonded to the p-metal.