Semiconductor-based sub-mounts for optoelectronic devices with conductive paths to facilitate testing and binning

An array of sub-mounts for optoelectronic devices comprising:

• a silicon substrate forming a two-dimensional array of sub-mounts, the array comprising respective columns and rows of sub-mounts for light emitting diodes, wherein each sub-mount comprises:
• a recess in a front-side of the substrate, the recess defined by sidewalls and a bottom surface, wherein a die attach pad for a light emitting diode, an anode pad and a cathode pad are on the bottom surface of the recess, and
• feed-through metallization electrically coupling the anode pad to a first contact pad on the back-side surface of the substrate, and feed-through metallization electrically coupling the cathode pad to a second contact pad on the back-side surface of the substrate;
• a first group of electrical paths each of which electrically connects together all the cathode pads in a respective column of sub-mounts;
• a second group of electrical paths each of which electrically connects together all the anode pads in a respective row of sub-mounts;
• and
• a plurality of probe pads each of which is electrically connected to a respective one of the electrical paths in the first or second groups.

A semiconductor structure comprising:

• a semiconductor substrate comprising a two-dimensional array of sub-mounts, the array comprising respective lines of sub-mounts in a first dimension and respective lines of sub-mounts in a second dimension, wherein each sub-mount comprises:
• a die attach pad for mounting a light emitting device on a front-side of the substrate, and first and second contact pads on the front-side of the substrate, and
• feed-through metallization in via structures extending from a surface within the recess to a back-side surface of the substrate, wherein the feed-through metallization in at least one of the via structures electrically couples the first contact pad on the front-side surface of the substrate to a first SMD pad on the back-side surface of the substrate, and wherein the feed-through metallization in at least one other via structure electrically couples the second contact pad on the front-side surface of the substrate to a second SMD pad on the back-side surface of the substrate;
• a first group of conductive paths each of which electrically connects together all the first contact pads in a respective line of sub-mounts in the first dimension;
• a second group of conductive paths each of which electrically connects together all the second contact pads in a respective line of sub-mounts in the second dimension;
• and
• a plurality of probe pads along a periphery of the substrate, wherein each of the probe pads is electrically connected to a respective one of the conductive paths in the first or second groups.