Semiconductor device and method for manufacturing the same

A semiconductor device comprising:

• a first electrode layer and a second electrode layer over a substrate;
• a first wiring layer and a second wiring layer over the first electrode layer and the second electrode layer, the first wiring layer being electrically connected to the first electrode layer, and the second wiring layer being electrically connected to the second electrode layer;
• an oxide semiconductor layer over the first wiring layer and the second wiring layer, the oxide semiconductor layer being in contact with a side face and a top face of each of the first electrode layer and the second electrode layer;
• a gate insulating film over the oxide semiconductor layer;
• and
• a gate electrode layer over the gate insulating film,
• wherein the gate electrode layer overlaps with an end portion of each of the first electrode layer and the second electrode layer and does not overlap with the first wiring layer and the second wiring layer,
• wherein electrical conductivity of each of the first electrode layer and the second electrode layer is equal to or higher than electrical conductivity of the oxide semiconductor layer, and
• wherein electrical conductivity of each of the first electrode layer and the second electrode layer is equal to or lower than electrical conductivity of each of the first wiring layer and the second wiring layer.

A method for manufacturing a semiconductor device comprising the steps;

• forming a gate electrode layer over a substrate;
• forming a gate insulating film over the gate electrode layer;
• forming a first electrode layer and a second electrode layer over the gate insulating film;
• forming a first wiring layer and a second wiring layer over the first electrode layer and the second electrode layer, the first wiring layer being electrically connected to the first electrode layer, and the second wiring layer being electrically connected to the second electrode layer;
• and
• forming an oxide semiconductor layer over the first wiring layer and the second wiring layer, the oxide semiconductor layer being in contact with a side face and a top face of each of the first electrode layer and the second electrode layer,
• wherein the gate electrode layer overlaps with an end portion of each of the first electrode layer and the second electrode layer and does not overlap with the first wiring layer and the second wiring layer,
• wherein electrical conductivity of each of the first electrode layer and the second electrode layer is equal to or higher than electrical conductivity of the oxide semiconductor layer, and
• wherein electrical conductivity of each of the first electrode layer and the second electrode layer is equal to or lower than electrical conductivity of each of the first wiring layer and the second wiring layer.

A method for manufacturing a semiconductor device comprising the steps of:

• forming a first electrode layer and a second electrode layer over a substrate;
• forming a first wiring layer and a second wiring layer over the first electrode layer and the second electrode layer, the first wiring layer being electrically connected to the first electrode layer, and the second wiring layer being electrically connected to the second electrode layer;
• forming an oxide semiconductor layer over the first wiring layer and the second wiring layer, the oxide semiconductor layer being in contact with a side face and a top face of each of the first electrode layer and the second electrode layer;
• forming a gate insulating film over the oxide semiconductor layer;
• and
• forming a gate electrode layer over the gate insulating film,
• wherein the gate electrode layer overlaps with an end portion of each of the first electrode layer and the second electrode layer and does not overlap with the first wiring layer and the second wiring layer,
• wherein electrical conductivity of each of the first electrode layer and the second electrode layer is equal to or higher than electrical conductivity of the oxide semiconductor layer, and
• wherein electrical conductivity of each of the first electrode layer and the second electrode layer is equal to or lower than electrical conductivity of each of the first wiring layer and the second wiring layer.