Test system and method of reducing damage in seed layers in metallization systems of semiconductor devices
AssigneeGlobalfoundries Inc.
InventorsFrank Feustel, Tobias Letz, Frank Koschinsky
Life of this patent
Estimating the term…
Abstract
During the formation of a complex metallization system, the influence of a manufacturing environment on sensitive barrier/seed material systems may be monitored or controlled by using an appropriate test pattern and applying an appropriate test strategy. For example, actual probe and reference substrates may be prepared and may be processed with and without exposure to the manufacturing environment of interest, thereby enabling an efficient evaluation of one or more parameters of the environment. Furthermore, an “optimized” manufacturing environment may be obtained on the basis of the test strategy disclosed herein.
Claims23
A method, comprising:
- forming a conductive layer on inner surface areas of a plurality of openings formed in a dielectric layer above a substrate of a semiconductor device, said plurality of openings formed in a specified test area of said substrate;
- exposing said substrate comprising said conductive layer to a manufacturing environment that is established on the basis of a specific parameter setting;
- forming a metal region in each of said plurality of openings of said substrate;
- determining a defect rate of said specified test area of said substrate;
- and
- adjusting at least one parameter value of said specific parameter setting of said manufacturing environment on the basis of said defect rate obtained from said substrate.
A method, comprising:
- forming a conductive layer on inner surface areas of a first plurality of openings formed in a first dielectric material and on inner surface areas of a second plurality of openings formed in a second dielectric material, said first and second dielectric materials being formed above a first and second substrate, respectively;
- selectively exposing said first substrate to a specified environment established on the basis of a controllable parameter setting;
- forming a metal region in each of said first and second pluralities of openings;
- determining at least one characteristic parameter of said metal regions of the first and second substrates;
- and
- adjusting at least one parameter value of said controllable parameter setting on the basis of said at least one characteristic parameter.
A test system for monitoring a manufacturing environment for semiconductor production, the test system comprising:
- a lithography mask comprising a test pattern to be formed in a dielectric material usable in a metallization layer of a semiconductor device, said test pattern comprising a plurality of test features, a first subset of said test features having first dimensions that correspond to a minimum design area defined by design rules of said metallization layer, a second subset of said test features having second dimensions corresponding to dimensions that are less than said first minimum design area, and a third subset of said test features comprising lines with a minimum design width.
Dependencies are inferred from the claim text.