Nonvolatile memory device and method for manufacturing nonvolatile memory device
AssigneeKabushiki Kaisha Toshiba
InventorHiroyuki FUKUMIZU
Life of this patent
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Abstract
A nonvolatile memory device includes: a first interconnection extending in a first direction; a second interconnection extending in a second direction nonparallel to the first direction; and a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied via the first interconnection and the second interconnection. A cross section parallel to the first and the second direction of the memory layer decreases toward the second interconnection.
Claims14
A nonvolatile memory device comprising:
- a first interconnection extending in a first direction;
- a second interconnection extending in a second direction nonparallel to the first direction;
- and
- a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied via the first interconnection and the second interconnection,
- a cross section parallel to the first and the second direction of the memory layer decreasing toward the second interconnection.
A method for manufacturing a nonvolatile memory device,
- the device including memory cells stacked in a plurality of layers,
- each of the memory cells including:
- a first interconnection extending in a first direction;
- a second interconnection extending in a second direction nonparallel to the first direction;
- and
- a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied via the first interconnection and the second interconnection,
- the method comprising:
- stacking a layer being to form the first interconnection, a layer being to form the memory layer, and a layer being to form the second interconnection in a third direction substantially perpendicular to the first direction and the second direction to form a stacked body;
- providing an etching mask having an opening on the stacked body;
- and
- forming an element isolation region by etching the stacked body via the etching mask, and
- an opening dimension of the etching mask being decreased with an increasing dimension in the third direction of the element isolation region in the providing the etching mask.
A method for manufacturing a nonvolatile memory device,
- the device including memory cells stacked in a plurality of layers,
- each of the memory cells including:
- a first interconnection extending in a first direction;
- a second interconnection extending in a second direction nonparallel to the first direction;
- and
- a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied through the first interconnection and the second interconnection,
- the method comprising:
- stacking a layer being to form the first interconnection, a layer being to form the memory layer, and a layer being to form the second interconnection in a third direction substantially perpendicular to the first direction and the second direction to form a stacked body;
- providing an etching mask having an opening on the stacked body;
- performing etching of a smaller dimension than a dimension in the third direction of an element isolation region in the third direction using the etching mask;
- forming a protection layer at least on a side wall face of the etched stacked body;
- further etching to a dimension in the third direction of the element isolation region;
- and
- controlling a size of a cross section parallel to the first and the second direction of the element isolation region by etching a portion of the side wall face on which the protection layer is not formed.
Dependencies are inferred from the claim text.