# US 2010/0169697 A1 · Control Device Having Output Pin Expansion Function and Output Pin Expansion Method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0169697 A1 - Document ID: US20100169697A1 - Status: Published application - Kind: A1 - Application number: 12/434,139 - Filed: 2009-05-01 - Published: 2010-07-01 - Earliest claimed: 2008-12-31 - Assignees: Askey Computer Corp. - Inventors: Yi-Chang Hsu; Chen-Kuo Huang; Ching-Feng Hsieh; Jen-Huan Yu - Web page: https://patentgrep.com/patent/US20100169697A1 ## CPC - H03K 19/1732: {by limitation or reduction of the pin/gate ratio (for data-processing equipment G06F1/22)} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A control device having an output pin expansion function and an output pin expansion method thereof are provided. The method includes: connecting at least a shift register unit having a plurality of data transmission pins to a control unit such that the shift register unit can receive strobe signals, a multi-bit data stream, clock signals and enable signals generated by the control unit; sending an enable signal by the control unit so as to allow the shift register unit to shift and store each bit of a multi-bit data stream according to a clock signal generated by the control unit; and sending a strobe signal by the control unit so as to allow the shift register unit to output the multi-bit data in parallel format as opposed to the received serial format through the plurality of data transmission pins, thereby allowing a processing device to interface with more devices (such as LED state indicators) than its fixed number of dedicated output pins would conveniently allow, thus saving costs and board space. ## Claims ### Claim 1 A control device having an output pin expansion function, comprising: a control unit for generating a strobe signal, a multi-bit data stream, a clock signal and an enable signal, wherein the control unit has first, second, third, and fourth output pins for outputting the strobe signal, the multi-bit data stream, the clock signal and the enable signal, respectively; and a shift register unit having a strobe signal input pin, a data input pin, a clock signal input pin, an enable signal input pin, and a plurality of data output transmission pins to output multi-bit data derived from the multi-bit data stream, wherein the strobe signal input pin, the data input pin, the clock signal input pin, and the enable signal input pin are connected to the first to fourth output pins of the control unit, respectively, and the shift register unit receives the enable signal through the enable signal input pin so as to shift and store each bit of the multi-bit data stream received through the data input pin according to the clock signal, and further receives the strobe signal through the strobe signal input pin so as to output the multi-bit data stream in parallel through the plurality of data transmission pins. ### Claim 2 (depends on 1) The device of claim 1, wherein the control unit counts the number of pulses of the clock signal, and generates the strobe signal when the count of said number of pulses of the clock signal is equal to the predetermined number of bits of the multi-bit data stream. ### Claim 3 (depends on 2) The device of claim 2, wherein the control unit changes the level of the strobe signal so as to enable the shift register unit to output the multi-bit data when the count of said number of pulses of the clock signal is equal to the predetermined number of bits of the multi-bit data stream. ### Claim 4 (depends on 1) The device of claim 1 further comprising two shift register units cascaded together by one of the plurality of data output transmission pins. ### Claim 5 (depends on 1) The device of claim 1, wherein the control unit is a central processing unit. ### Claim 6 (depends on 1) The device of claim 1, further comprising: a memory connected to the control unit; and software programs stored in the memory for controlling the control unit. ### Claim 7 (depends on 6) The device of claim 6, wherein the software programs further control the shift register unit. ### Claim 8 (depends on 6) The device of claim 6, wherein the memory is disposed in the control unit. ### Claim 9 (depends on 6) The device of claim 6, wherein the memory is disposed outside the control unit. ### Claim 10 An output pin expansion method for expanding data output pins of a control unit, comprising: connecting at least a shift register unit having a plurality of data output transmission pins to a control unit such that the shift register unit can receive strobe signals, a multi-bit data stream, clock signals and enable signals generated by the control unit; sending an enable signal by the control unit so as to allow the shift register unit to shift and store each bit of a multi-bit data stream according to a clock signal generated by the control unit; and sending a strobe signal by the control unit so as to allow the shift register unit to output multi-bit data derived from the multi-bit data stream in parallel through the plurality of data output transmission pins. ### Claim 11 (depends on 10) The method of claim 10, wherein after the control unit sends the enable signal, the control unit counts the number of pulses of the clock signal and generates the strobe signal when the count of said number of pulses of the clock signal is equal to the predetermined number of bits of the multi-bit data stream. ### Claim 12 (depends on 11) The method of claim 11, wherein the control unit changes the level of the strobe signal so as to enable the shift register unit to output the multi-bit data when the count of said number of pulses of the clock signal is equal to the predetermined number of bits of the multi-bit data.