# US 2010/0169671 A1 · Cryptoprocessor with improved data protection

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- Number: US 2010/0169671 A1
- Document ID: US20100169671A1
- Status: Published application
- Kind: A1
- Application number: 12/600,747
- Filed: 2008-05-19
- Published: 2010-07-01
- Earliest claimed: 2007-05-21
- Assignees: Ingenico France
- Inventors: Alain Coussieu; Alain Eck
- Web page: https://patentgrep.com/patent/US20100169671A1

## CPC

- G06F 21/75: by inhibiting the analysis of circuitry or operation
- G06F 2221/2143: Clearing memory, e.g. to prevent the data from being stolen
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

The invention relates to an electronic circuit comprising: a first random-access data storage element, a processing module designed to delete the first storage element, and an access terminal which is connected to the processing module and receives a first power signal supplied by a first power source external to the electronic circuit. The circuit also includes a second random-access storage element in which a key is stored, said key being used to encrypt the data and a second power source which is built into the electronic circuit and supplies a second power signal to the processing module. The processing module is designed to detect an unauthorized access attempt by comparing the first and second power signals and to delete the key when the processing module is powered by the second power source.

## Claims

### Claim 1

An electronic circuit made in integrated form, comprising:
a first data storage RAM;
a second RAM in which a key is stored, said data being encrypted by implementation of said key;
a processing unit capable of performing a deleting operation in the first RAM;
an access terminal connected to the processing unit and intended to receive a first power supply signal provided by a first power supply source external to the electronic circuit; and
a second power supply source integrated to the electronic circuit and capable of providing a second power supply signal to the processing unit, the processing unit being capable of detecting that an unauthorized access attempt is occurring based on the comparison of the first and second power supply signals and of deleting said key while the processing unit is powered by the second power supply source.

### Claim 2 (depends on 1)

The electronic circuit of claim 1, wherein the second power supply source comprises a capacitive element connected to the access terminal and to the processing unit, the electronic circuit further comprising a device capable of preventing a fast discharge of the capacitive element by an external action on the access terminal.

### Claim 3 (depends on 2)

The electronic circuit of claim 2, wherein the processing unit comprises MOS transistors and wherein the capacitive element corresponds to the stray capacitances of the MOS transistors.

### Claim 4 (depends on 1)

The electronic circuit of claim 1, wherein the storage capacity of the second RAM is smaller than the storage capacity of the first RAM.

### Claim 5 (depends on 1)

The electronic circuit of any claim 1, wherein the storage capacity of the second RAM is smaller than one thousand bits.

### Claim 6 (depends on 1)

The electronic circuit of claim 1, comprising an additional access terminal intended to be connected to a third power supply source, external to the electronic circuit, ensuring the power supply of the processing unit in a normal operating mode of the electronic circuit, the first power supply source ensuring the power supply of the processing unit when the third power supply source is inactive.

### Claim 7 (depends on 1)

The electronic circuit of claim 1, wherein the first power supply source comprises a cell connected to the access terminal and a capacitor assembled in parallel across the cell.

### Claim 8 (depends on 1)

A system, especially a card reader, comprising a package containing a power supply source and the electronic circuit of claim 1 connected to the power supply source.

### Claim 9

A method for protecting data stored in a first RAM of an electronic circuit, the electronic circuit further comprising a second RAM at the level of the electronic circuit in which a key is stored, said data being obtained by an encryption implementing said key, a processing unit capable of performing a delete operation in the first RAM and an access terminal connected to the processing unit and intended to receive a first power supply signal delivered by a first power supply source, external to the electronic circuit, the method being characterized in that it comprises providing a second power supply source integrated to the electronic circuit and capable of providing a second power supply signal to the processing unit and in that it comprises having the processing unit detect that an unauthorized access attempt is occurring based on the comparison of the first and second power supply signals and delete said key, the processing unit being then powered by the second power supply source.

### Claim 10 (depends on 9)

The method of claim 9, wherein the first power supply signal corresponds to a first voltage and wherein the second power supply signal corresponds to a second voltage, an unauthorized access attempt being detected when the difference between the second and first voltages is greater than a given threshold for a given time period.
