# US 2010/0169607 A1 · Reconfigurable circuit, its design method, and design apparatus

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- Number: US 2010/0169607 A1
- Document ID: US20100169607A1
- Status: Published application
- Kind: A1
- Application number: 12/635,347
- Filed: 2009-12-10
- Published: 2010-07-01
- Earliest claimed: 2008-12-25
- Assignees: Fujitsu Microelectronics Limited
- Inventors: Shinichi SUTOU
- Web page: https://patentgrep.com/patent/US20100169607A1

## CPC

- G06F 15/7867: {with reconfigurable architecture}
- G06F 30/30: Circuit design
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A reconfigurable circuit design method includes an input step of inputting design data of a default configuration of a reconfigurable circuit including a plurality of processor elements which perform processing and a first generation step of generating design data obtained by modifying at least one of the processor elements in the reconfigurable circuit with the default configuration.

## Claims

### Claim 1

A reconfigurable circuit design method comprising:
an input step of inputting design data representing a default configuration of a reconfigurable circuit, wherein the design data includes a description of a plurality of processor elements; and
a first generation step of generating first additional design data, wherein the first additional design data is obtained by modifying the design data such that at least one of the processor elements in the reconfigurable circuit with the default configuration is modified.

### Claim 2 (depends on 1)

The reconfigurable circuit design method according to claim 1, wherein
the first generation step further comprises generating the first additional design data by replacing at least one of the processor elements in the reconfigurable circuit with another processor element.

### Claim 3 (depends on 1)

The reconfigurable circuit design method according to claim 1, further comprising
a second generation step of clustering a unit of the plurality of processor elements in the reconfigurable circuit and generating second additional design data by modifying units of a plurality of the clusters in the reconfigurable circuit.

### Claim 4 (depends on 3)

The reconfigurable circuit design method according to claim 3, wherein
the second generation step further comprises generating the second additional design data by replacing at least one of the clusters in the reconfigurable circuit with another cluster.

### Claim 5 (depends on 3)

The reconfigurable circuit design method according to claim 3, further comprising
a third generation step of grouping the plurality of clusters in the reconfigurable circuit and generating third additional design data obtained by modifying the cluster groups.

### Claim 6

The reconfigurable circuit design method according to claim wherein
the third generation step further comprises generating the third additional design data by replacing at least one of the cluster groups in the reconfigurable circuit with another cluster group.

### Claim 7 (depends on 5)

The reconfigurable circuit design method according to claim 5, further comprising
a fourth generation step of generating fourth additional design data by modifying an interface circuit of the reconfigurable circuit.

### Claim 8

A reconfigurable circuit design apparatus comprising:
an input section which inputs design data of a default configuration of a reconfigurable circuit including a plurality of processor elements configured to perform processing; and
a first generation section which generates first additional design data by modifying at least one of the processor elements of the reconfigurable circuit with the default configuration.

### Claim 9

A reconfigurable circuit comprising
a plurality of clusters,
wherein each of the clusters includes a plurality of processor elements configured to perform an operation.

### Claim 10 (depends on 9)

The reconfigurable circuit according to claim 9, further comprising
a plurality of cluster groups,
wherein each of the cluster groups includes the plurality of clusters.