# US 2010/0169547 A1 · Method for preventing data loss during solder reflow process and memory device using the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0169547 A1 - Document ID: US20100169547A1 - Status: Published application - Kind: A1 - Application number: 12/404,332 - Filed: 2009-03-15 - Published: 2010-07-01 - Earliest claimed: 2008-12-25 - Assignees: Silicon Motion, Inc. - Inventors: Hsu-Ping Ou - Web page: https://patentgrep.com/patent/US20100169547A1 ## CPC - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G11C 11/5628: {Programming or writing circuits; Data input circuits} - G11C 16/20: Initialising; Data preset; Chip identification - G06F 2212/7205: Cleaning, compaction, garbage collection, erase control - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract The invention provides a method for preventing data loss in a flash memory during a solder reflow process. The flash memory includes a plurality of memory blocks and each memory block includes a plurality of strong pages and weak pages. Preloading data is first received and stored into the strong pages of at least one of first memory block within the flash memory. Then, the flash memory is heated for the solder reflow process. Next, the preloading data is reorganized according to a trigger signal and the strong pages and weak pages of at least one of second memory block within the flash memory are provided for storing the reorganized preloading data. ## Claims ### Claim 1 A method for preventing data loss in a flash memory during a solder reflow process, wherein the flash memory comprises a plurality of memory blocks, each of which having a plurality of strong pages and a plurality of weak pages, comprising: receiving a preloading data; storing the preloading data into the strong pages of at least one first memory within the flash memory; heating the flash memory for performing the solder reflow process; and reorganizing the preloading data according to a trigger signal and then sequentially storing the reorganized preloading data into the strong pages and the weak pages of at least one second memory block within the flash memory. ### Claim 2 (depends on 1) The method according to claim 1, wherein the trigger signal is generated according to a recovery command. ### Claim 3 (depends on 1) The method according to claim 1, wherein the trigger signal is generated according to a state of a preset pin of the flash memory. ### Claim 4 (depends on 1) The method according to claim 1, wherein the strong pages and the weak pages are alternately arranged on the basis of a predetermined order within each memory block. ### Claim 5 (depends on 1) The method according to claim 1, wherein the storage size of each first memory block is smaller than that of each second memory block. ### Claim 6 (depends on 5) The method according to claim 5, wherein each first memory block has half the storage size with respect to that of each second memory block. ### Claim 7 (depends on 5) The method according to claim 5, further comprising: storing the reorganized preloading data into the at least one second memory block and erasing the at least one first memory block, wherein each erased first memory block has the same storage size as each second memory block. ### Claim 8 (depends on 1) The method according to claim 1, further comprising: determining whether the preloading data stored in the at least one second memory block is correct. ### Claim 9 (depends on 1) The method according to claim 1, wherein the programming busy time of each strong page for storing data is less than that of each weak page. ### Claim 10 (depends on 1) The method according to claim 1, wherein the flash memory is a NAND flash memory. ### Claim 11 (depends on 1) The method according to claim 1, wherein each memory block is a multi-level cell memory block. ### Claim 12 A memory device, comprising: a flash memory for storing data, wherein the flash memory comprises a plurality of memory blocks, each of which having a plurality of strong pages and a plurality of weak pages; and a controller coupled to the flash memory for receiving a preloading data, storing the preloading data into the strong pages of at least one first memory block within the flash memory, wherein the flash memory is heated for performing a solder reflow process and the controller reorganizes the preloading data according to a trigger signal and sequentially stores the reorganized preloading data into the strong pages and the weak pages of at least one second memory block within the flash memory. ### Claim 13 (depends on 12) The memory device according to claim 12, wherein the trigger signal is generated according to a recovery command from a host. ### Claim 14 (depends on 12) The memory device according to claim 12, wherein the trigger signal is generated according to a state of a preset pin of the flash memory. ### Claim 15 (depends on 12) The memory device according to claim 12, wherein the strong pages and the weak pages are alternately arranged on the basis of a predetermined order. ### Claim 16 (depends on 12) The memory device according to claim 12, wherein the storage size of each first memory block is smaller than that of each second memory block. ### Claim 17 (depends on 16) The memory device according to claim 16, wherein each first memory block has half the storage size with respect to that of each second memory block. ### Claim 18 (depends on 16) The memory device according to claim 16, wherein the reorganized preloading data is stored into the at least one second memory block, the controller erases the at least one first memory block, and each erased first memory block and each second memory block have the same storage size. ### Claim 19 (depends on 12) The memory device according to claim 12, wherein the controller determines whether the preloading data stored in the at least one second memory block is correct. ### Claim 20 (depends on 12) The memory device according to claim 12, wherein the programming busy time of each strong page for storing data is less than that of each weak page.