# US 2010/0167488 A1 · Integrated circuit comprising a gradually doped bipolar transistor and corresponding fabrication process

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- Number: US 2010/0167488 A1
- Document ID: US20100167488A1
- Status: Published application
- Kind: A1
- Application number: 12/720,404
- Filed: 2010-03-09
- Published: 2010-07-01
- Earliest claimed: 2005-11-16
- Assignees: STMicroelectronics S.r.l.
- Inventors: Damien Lenoble; Thierry Schwartzmann; Laurence Boissonnet
- Web page: https://patentgrep.com/patent/US20100167488A1

## CPC

- H10D 10/021: {of heterojunction BJTs [HBT]}
- H10D 10/311: {Thin-film BJTs}
- H10D 10/891: {comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors}
- H10D 62/137: {Collector regions of BJTs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An integrated circuit includes a bipolar transistor comprising a substrate and a collector formed in the substrate. The collector includes a highly doped lateral zone, a very lightly doped central zone and a lightly doped intermediate zone located between the central zone and the lateral zone 4a of the collector. The substrate includes a lightly doped lateral zone and a highly doped central zone. The dopant species in the zone of the substrate are electrically inactive.

## Claims

### Claim at position 1

1-9. (canceled)

### Claim 10

A method for making an integrated circuit comprising:
forming a collector of a bipolar transistor in an upper layer of a substrate by implanting at least one dopant species to form a highly doped lateral zone, a very lightly doped central zone and a lightly doped intermediate zone between the central zone and the lateral zone; and
as a result of forming the collector, forming a lower layer of the substrate underlying the collector to have a lightly doped lateral zone and a highly doped central zone, with dopant species in the central zone being electrically inactive.

### Claim 11 (depends on 10)

A method according to claim 10, wherein implanting is performed at an angle of 0°.

### Claim 12 (depends on 10)

A method according to claim 10, further comprising forming a dopant absorbing layer above the collector.

### Claim 13 (depends on 12)

A method according to claim 12, wherein the dopant absorbing layer has at least one aperture to permit implanting therethrough.

### Claim 14 (depends on 10)

A method according to claim 10, wherein the lightly doped intermediate zone has a dopant concentration within a range of 1016 atoms/cm3 to 1019 atoms/cm3.

### Claim 15 (depends on 10)

A method according to claim 10, wherein the very lightly doped central zone has a dopant concentration within a range of 1015 atoms/cm3 to 1017 atoms/cm3.

### Claim 16 (depends on 10)

A method according to claim 10, wherein the highly doped lateral zone has a dopant concentration within a range of 1020 to 1021 atoms/cm3.

### Claim 17

A method for making an integrated circuit comprising:
forming a bipolar transistor comprising a collector in an upper layer of a substrate so that the collector has a highly doped lateral zone, a very lightly doped central zone and a lightly doped intermediate zone between the central zone and the lateral zone; and
forming a lower layer of the substrate underlying the collector to have a lightly doped lateral zone and a highly doped central zone, with dopant in the central zone being electrically inactive.

### Claim 18 (depends on 17)

A method according to claim 17, further comprising forming a dopant absorbing layer above the collector.

### Claim 19 (depends on 18)

A method according to claim 18, wherein the dopant absorbing layer has at least one aperture to permit implanting therethrough.

### Claim 20 (depends on 17)

A method according to claim 17, wherein the lightly doped intermediate zone has a dopant concentration within a range of 1016 atoms/cm3 to 1019 atoms/cm3.

### Claim 21 (depends on 17)

A method according to claim 17, wherein the very lightly doped central zone has a dopant concentration within a range of 1015 atoms/cm3 to 1017 atoms/cm3.

### Claim 22 (depends on 17)

A method according to claim 17, wherein the highly doped lateral zone has a dopant concentration within a range of 1020 to 1021 atoms/cm3.

### Claim 23

A method for making an integrated circuit comprising:
providing a silicon-on-insulator substrate comprising an insulator layer and a silicon layer thereon; and
forming a bipolar transistor comprising a collector in the silicon layer so that the collector has a highly doped lateral zone, a very lightly doped central zone and a lightly doped intermediate zone between the central zone and the lateral zone; and with the insulating layer underlying the collector having a lightly doped lateral zone and a highly doped central zone, with dopant in the central zone being electrically inactive.

### Claim 24 (depends on 23)

A method according to claim 23, further comprising forming a dopant absorbing layer above the collector.

### Claim 25 (depends on 24)

A method according to claim 24, wherein the dopant absorbing layer has at least one aperture to permit implanting therethrough.

### Claim 26 (depends on 23)

A method according to claim 23, wherein the lightly doped intermediate zone has a dopant concentration within a range of 1016 atoms/cm3 to 1019 atoms/cm3.

### Claim 27 (depends on 23)

A method according to claim 23, wherein the very lightly doped central zone has a dopant concentration within a range of 1015 atoms/cm3 to 1017 atoms/cm3.

### Claim 28 (depends on 23)

A method according to claim 23, wherein the highly doped lateral zone has a dopant concentration within a range of 1020 to 1021 atoms/cm3.

### Claim 29

A method for making an integrated circuit comprising:
providing a substrate comprising a lower layer and an upper layer thereon; and
forming a bipolar transistor comprising a collector in the upper layer of the substrate, the collector comprising a lateral zone with a first dopant concentration, a central zone with a second dopant concentration and an intermediate zone with a third dopant concentration between the central zone and the lateral zone; and with the lower layer of the substrate comprising a lateral zone with a fourth dopant concentration and a central zone with a fifth dopant concentration, with dopant in the central zone being electrically inactive.

### Claim 30 (depends on 29)

A method according to claim 29, wherein the third dopant concentration is within a range of 1016 atoms/cm3 to 1019 atoms/cm3.

### Claim 31 (depends on 29)

A method according to claim 29, wherein the fifth dopant concentration is within a range of 1015 atoms/cm3 to 1017 atoms/cm3, and the fourth dopant concentration is within a range of 1020 to 1021 atoms/cm3.

### Claim 32 (depends on 29)

A method according to claim 29, wherein the substrate comprises a silicon-on-insulator (SOI) substrate, with the lower layer of the substrate being the insulator portion thereof.