# US 2010/0166117 A1 · Data receiving apparatus and method

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- Number: US 2010/0166117 A1
- Document ID: US20100166117A1
- Status: Published application
- Kind: A1
- Application number: 12/649,142
- Filed: 2009-12-29
- Published: 2010-07-01
- Earliest claimed: 2008-12-30
- Assignees: Dongbu HiTek Co., Ltd.
- Inventors: Woo Jae Choi; Sang Ho Woo; Mi Youn Kim
- Web page: https://patentgrep.com/patent/US20100166117A1

## CPC

- H04L 25/0292: {Arrangements specific to the receiver end}
- G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters}
- G09G 2330/06: Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
- G09G 2370/08: Details of image data interface between the display device controller and the data line driver circuit
- H04L 7/0008: {Synchronisation information channels, e.g. clock distribution lines}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A data receiving apparatus and method includes a current-voltage conversion block, which receives a current-type transmit signal including data and a clock signal inserted into the data at a different level from the data, and then converts the received signal into at least one first voltage and at least one second voltage having a different level from the first voltage, and a comparison block, which makes a comparison between the first and second voltages, and then outputs the received signal as one of the data and the clock signal based on a result of the comparison. The data receiving apparatus can easily recover a clock signal while exhibiting better characteristics during the recovery of the clock signal because it is insensitive to a variation in reference voltage and a variation in current at the transmitting state of the timing controller, which are caused by a process variation.

## Claims

### Claim 1

An apparatus comprising:
a current-voltage conversion block, which receives a current-type transmit signal, including data and a clock signal inserted into the data at a different level from the data, and then converts the received signal into at least one first voltage and at least one second voltage having a different level from the first voltage; and
a comparison block, which makes a comparison between the first and second voltages, and then outputs the received signal as one of the data and the clock signal based on a result of the comparison.

### Claim 2 (depends on 1)

The apparatus of claim 1, including a power supply unit, which adjusts a level of an external supply voltage.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the power supply unit outputs an internal supply voltage corresponding to the level-adjusted external supply voltage, as a supply voltage for the current-voltage conversion block and the comparison block.

### Claim 4 (depends on 3)

The apparatus of claim 3, wherein the power supply unit includes a bandgap reference voltage generator, which receives the external supply voltage, and then outputs a reference voltage.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the power supply unit includes at least one voltage regulator, which adjusts a level of the reference voltage, and then outputs the level-adjusted reference voltage as the internal voltage.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein the voltage regulator includes a low drop-out regulator.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the current-voltage conversion block includes
a first current-voltage converter, which outputs a plurality of first voltages corresponding to a level of the received signal.

### Claim 8 (depends on 7)

The apparatus of claim 7, wherein the current-voltage conversion block includes a second current-voltage converter, which outputs a plurality of second voltages each having a different level from the first voltages.

### Claim 9 (depends on 8)

The apparatus of claim 8, wherein the first current-voltage converter includes a first trans-impedance amplifier, which amplifies the received signal.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the first current-voltage converter includes first resistors, each of which is connected in parallel between an output node of the first trans-impedance amplifier and a node for outputting an associated one of the first voltages.

### Claim 11 (depends on 10)

The apparatus of claim 10, wherein the second current-voltage converter includes a second trans-impedance amplifier, which amplifies the received signal.

### Claim 12 (depends on 11)

The apparatus of claim 11, wherein the second current-voltage converter includes a second resistor, which is connected to an output node of the second trans-impedance amplifier, and has a lower resistance than the first resistors.

### Claim 13 (depends on 12)

The apparatus of claim 12, wherein the second current-voltage converter includes a third resistor, which is connected to the output node of the second trans-impedance amplifier, and has a higher resistance than the first resistors.

### Claim 14 (depends on 1)

The apparatus of claim 1, wherein the comparison block includes a first comparator, which compares the first and second voltages to determine whether the first voltage is higher than the second voltage.

### Claim 15 (depends on 14)

The apparatus of claim 14, wherein the comparison block includes a second comparator, which compares the first and second voltages to determine whether the second voltage is higher than the first voltage.

### Claim 16 (depends on 1)

The apparatus of claim 1, including a delay-locked loop, which delays the clock signal received from the comparison block for different times.

### Claim 17 (depends on 1)

The apparatus of claim 1, wherein the delay-locked loop further generates a plurality of recovered clock signals, inserts the recovered clock signals into the data received from the comparison block, and outputs the resultant signal.

### Claim 18

A method comprising:
receiving a current-type transmit signal including data and a clock signal inserted into the data at a different level from the data;
converting the received signal into at least one first voltage, and converting the received signal into at least one second voltage having a different level from the first voltage;
comparing the first voltage and the second voltage, and outputting the received signal as one of the data and the clock signal based on a result of the comparison.

### Claim 19 (depends on 18)

The method of claim 18, wherein the outputting of one of the data and the clock signal includes outputting the received transmit signal as the data when the first voltage is higher than the second voltage.

### Claim 20 (depends on 19)

The method of claim 19, wherein the outputting of one of the data and the clock signal includes outputting the received transmit signal as the clock signal when the first voltage is lower than the second voltage.
