# US 2010/0166013 A1 · Recognition systems based on pattern matching > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0166013 A1 - Document ID: US20100166013A1 - Status: Published application - Kind: A1 - Application number: 12/347,292 - Filed: 2008-12-31 - Published: 2010-07-01 - Earliest claimed: 2008-12-31 - Assignees: O2Micro, Inc. - Inventors: Zhenyu LIU - Web page: https://patentgrep.com/patent/US20100166013A1 ## CPC - H04L 69/16: Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP] - H04L 67/02: based on web technology, e.g. hypertext transfer protocol [HTTP] - H04L 69/161: {Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A recognition system for recognizing a data packet includes a data memory for storing data units in a predetermined order. A first data unit includes an instruction for determining a characteristic of the data packet. The first data unit also includes the total number of the data units, and a corresponding sequence number for the first data unit. The recognition system further includes a matching processor coupled to the data memory. The matching processor can execute the instruction in the first data unit to generate a result. The matching processor can also provide an address pointer according to the execution result, the total number of the data units, and the corresponding sequence number of the first data unit. ## Claims ### Claim 1 A recognition system for recognizing a data packet, said system comprising: a data memory for storing a plurality of data units in a predetermined order, a first data unit in said plurality of data units comprising: an instruction for determining a characteristic of said data packet; a total number of data units in said plurality of data units; and a corresponding sequence number for said first data unit; and a matching processor coupled to said data memory and for executing said instruction, and for generating a result of said execution, and for providing an address pointer according to said execution result, said total number and said corresponding sequence number. ### Claim 2 (depends on 1) The recognition system as claimed in claim 1, wherein said matching processor accesses a second data unit in said data memory according to said address pointer and executes an instruction in said second data unit. ### Claim 3 (depends on 1) The recognition system as claimed in claim 1, wherein said instruction comprises a keyword representative of said instruction in an instruction set. ### Claim 4 (depends on 1) The recognition system as claimed in claim 1, wherein said instruction comprises at least one parameter for said execution of said instruction. ### Claim 5 (depends on 1) The recognition system as claimed in claim 1, wherein said predetermined order is determined by a logical relationship of said plurality of data units. ### Claim 6 (depends on 5) The recognition system as claimed in claim 5, wherein said logical relationship comprises logical AND. ### Claim 7 (depends on 6) The recognition system as claimed in claim 6, wherein said address pointer points to a second data unit stored next to said first data unit when said execution result has a Boolean value that is true. ### Claim 8 (depends on 6) The recognition system as claimed in claim 6, wherein said address pointer points to a second data unit stored next to said plurality of data units when said execution result has a Boolean value that is false. ### Claim 9 (depends on 5) The recognition system as claimed in claim 5, wherein said logical relationship comprises logical OR. ### Claim 10 (depends on 9) The recognition system as claimed in claim 9, wherein said address pointer points to a second data unit stored next to said plurality of data units when said execution result has a Boolean value that is true. ### Claim 11 (depends on 9) The recognition system as claimed in claim 9, wherein said address pointer points to a second data unit stored next to said first data unit when said execution result has a Boolean value that is false. ### Claim 12 A method for recognizing a data packet comprising: accessing a first data unit in a plurality of data units; executing an instruction in said first data unit; determining a characteristic of said data packet according to a result of said execution; and providing an address pointer according to said execution result, a total number of data units in said plurality of data units, and a corresponding sequence number for said first data unit. ### Claim 13 (depends on 12) The method as claimed in claim 12, further comprising: accessing a second data unit according to said address pointer; and executing an instruction in said second data unit. ### Claim 14 (depends on 12) The method as claimed in claim 12, wherein said plurality of data units are stored in a data memory in a predetermined order that is determined by a logical relationship of said plurality of data units. ### Claim 15 (depends on 14) The method as claimed in claim 14, wherein said logical relationship comprises logical AND. ### Claim 16 (depends on 15) The method as claimed in claim 15, further comprising generating said address pointer pointing to a second data unit stored next to said first data unit when said execution result has a Boolean value that is true. ### Claim 17 (depends on 15) The method as claimed in claim 15, further comprising generating said address pointer pointing to a second data unit stored next to said plurality of data units when said execution result has a Boolean value that is false. ### Claim 18 (depends on 14) The method as claimed in claim 14, wherein said logical relationship comprises logical OR. ### Claim 19 (depends on 18) The method as claimed in claim 18, further comprising generating said address pointer pointing to a second data unit stored next to said plurality of data units when said execution result has a Boolean value that is true. ### Claim 20 (depends on 18) The method as claimed in claim 18, further comprising generating said address pointer pointing to a second data unit stored next to said first data unit when said execution result has a Boolean value that is false. ### Claim 21 A recognition system for recognizing a data packet, said system comprising: a data memory for providing a plurality of instructions respectively for determining a plurality of characteristics of said data packet; and a matching processor coupled to said data memory and for executing a first instruction of said plurality of instructions, and for generating a result of said execution, and for generating an instruction pointer according to said execution result, a total number of instructions in said plurality of instructions, and a corresponding sequence number for said first instruction. ### Claim 22 (depends on 21) The recognition system as claimed in claim 21, wherein said matching processor accesses a second instruction in said data memory according to said instruction pointer and executes said second instruction. ### Claim 23 (depends on 21) The recognition system as claimed in claim 21, wherein said execution result comprises a Boolean value. ### Claim 24 (depends on 21) The recognition system as claimed in claim 21, wherein said plurality of instructions are stored in said data memory in a predetermined order that is determined by a logical relationship of said plurality of instructions. ### Claim 25 (depends on 24) The recognition system as claimed in claim 24, wherein said logical relationship comprises logical AND. ### Claim 26 (depends on 24) The recognition system as claimed in claim 24, wherein said logical relationship comprises logical OR.