# US 2010/0164528 A1 · Methods and Apparatus to Test Electronic Devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0164528 A1 - Document ID: US20100164528A1 - Status: Published application - Kind: A1 - Application number: 12/345,419 - Filed: 2008-12-29 - Published: 2010-07-01 - Earliest claimed: 2008-12-29 - Assignees: Texas Instruments Incorporated - Inventors: Abidur Rahman; Chris Vogel - Web page: https://patentgrep.com/patent/US20100164528A1 ## CPC - G01R 31/2621: {for testing field effect transistors, i.e. FET's} - G01R 35/005: {Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references (G01R33/0035, G01R35/002 take precedence)} - G01R 1/36: Overload-protection arrangements or circuits for electric measuring instruments - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract Methods and apparatus to test electronic devices are disclosed. An example method includes setting a first controlled switch to prevent a current detect signal from tripping an overcurrent protection event controlling an operation of the device; setting a second controlled switch to route a first sensed voltage associated with the device to a voltage adjuster; sending a calibration current corresponding to a target threshold current through the device; detecting the first sensed voltage while the calibration current flows through the device; and setting a reference signal substantially equal to the first sensed voltage, wherein the reference signal is to be used to generate the current detect signal. ## Claims ### Claim 1 A method of testing a device, comprising: setting a first controlled switch to prevent a current detect signal from tripping an overcurrent protection event controlling an operation of the device; setting a second controlled switch to route a first sensed voltage associated with the device to a voltage adjuster; sending a calibration current corresponding to a target threshold current through the device; detecting the first sensed voltage while the calibration current flows through the device; and setting a reference signal substantially equal to the first sensed voltage, wherein the reference signal is to be used to generate the current detect signal. ### Claim 2 (depends on 1) A method as defined in claim 1, further comprising detecting a second sensed voltage associated with the device while the calibration current flows through the device. ### Claim 3 (depends on 2) A method as defined in claim 2, further comprising using the second sensed voltage to measure an on-resistance of the device. ### Claim 4 (depends on 1) A method as defined in claim 1, wherein setting the reference signal comprises adjusting one or more trim bits associated with the reference signal. ### Claim 5 (depends on 1) A method as defined in claim 1, wherein the first sensed voltage and the reference signal are to be compared to generate the current detect signal. ### Claim 6 (depends on 1) A method as defined in claim 1, further comprising removing the calibration current from the device before setting the reference signal substantially equal to the first sensed voltage. ### Claim 7 (depends on 1) A method as defined in claim 1, further comprising: sending a first verification current through the device; determining whether the current detect signal is activated in response to the first verification current; sending a second verification current less than the first verification current through the device; and determining whether the current detect signal is activated in response to the second verification current. ### Claim 8 (depends on 7) A method as defined in claim 7, wherein the first verification current is greater than the target threshold current, and wherein the second verification current is less than the target threshold current. ### Claim 9 (depends on 7) A method as defined in claim 7, further comprising rejecting the device as functioning incorrectly in response to determining that the current detect signal is not activated in response to the first verification current. ### Claim 10 (depends on 7) A method as defined in claim 7, further comprising rejecting the device as functioning incorrectly in response to determining that the current detect signal is activated in response to the second verification current. ### Claim 11 (depends on 1) A method as defined in claim 1, further comprising a controller to switch off the device in response to the current detect signal tripping the overcurrent protection event. ### Claim 12 An apparatus to test a field-effect transistor (FET), comprising: a FET controller to receive a current detect signal from a comparator, the FET controller to turn off the FET when the current detect signal indicates an overcurrent condition; a first controlled switch coupled to the comparator and the FET controller, the first controlled switch to prevent the current detect signal from reaching the FET controller; a current source coupled to the FET to send a calibration current corresponding to a target threshold current through the FET; a resistor coupled to a sense FET mirroring the FET, the resistor to detect a first voltage associated with the FET while the calibration current flows through the FET; and a voltage adjuster to set a reference voltage substantially equal to the first voltage, the comparator to receive the reference voltage to be used to generate the current detect signal. ### Claim 13 (depends on 12) An apparatus as defined in claim 12, further comprising a second controlled switch to route the first voltage to the voltage adjuster to set the reference signal substantially equal to the first characteristic. ### Claim 14 (depends on 12) An apparatus as defined in claim 12, further comprising a measurement unit coupled to the FET to detect a second voltage associated with the FET while the calibration current flows through the FET. ### Claim 15 (depends on 14) An apparatus as defined in claim 14, wherein the second voltage is a drain-source voltage associated with the FET while the calibration current flows through the FET. ### Claim 16 (depends on 14) An apparatus as defined in claim 14, wherein the measurement unit uses the second voltage to measure an on-resistance of the FET. ### Claim 17 (depends on 12) An apparatus as defined in claim 12, wherein the voltage adjuster sets the reference signal substantially equal to the first voltage by adjusting one or more trim bits of a reference voltage generation and trim unit. ### Claim 18 (depends on 12) An apparatus as defined in claim 12, further comprising a tester instrument coupled to the FET to verify the reference voltage by sending a first verification current through the FET; determining whether the current detect signal indicates that the FET controller would turn off the FET in response to the first verification current during normal operation of the device; sending a second verification current through the FET; and determining whether the current detect signal indicates that the FET controller would turned off the FET in response to the second verification current during normal operation of the device. ### Claim 19 (depends on 18) An apparatus as defined in claim 18, wherein the first verification current is greater than the target threshold current, and wherein the second verification current is less than the target threshold current. ### Claim 20 A method of testing a field-effect transistor (FET), comprising: setting a first controlled switch to prevent a current detect signal from reaching a FET controller, the FET controller to turn off the FET when the current detect signal indicates an overcurrent condition; setting a second controlled switch to route a first voltage associated with the FET to a voltage adjuster; sending a calibration current corresponding to a target threshold current through the FET; measuring the first voltage while the calibration current flows through the FET; measuring a second voltage associated with the FET while the calibration current flows through the FET; removing the calibration current from the FET after the first and second voltages are measured; calculating an on-resistance of the FET using the second voltage; and setting a reference voltage substantially equal to the first voltage, the reference voltage to be used to generate the current detect signal.