# US 2010/0164469 A1 · On-chip power management > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0164469 A1 - Document ID: US20100164469A1 - Status: Published application - Kind: A1 - Application number: 12/592,942 - Filed: 2009-12-04 - Published: 2010-07-01 - Earliest claimed: 2008-12-05 - Assignees: STMicroelectronics Pvt. Ltd. - Inventors: Nitin Bansal - Web page: https://patentgrep.com/patent/US20100164469A1 ## CPC - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - H02J 1/00: Circuit arrangements for DC mains or DC distribution networks - H02M 1/36: Means for starting or stopping converters - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract The present disclosure teaches a power management device for providing one or more voltages and prohibiting the operation until the IC is initialized and voltage stability is achieved. The power management device includes a power regulator block and a masking block. The power regulator block includes one or more of the following elements: -a regulator, a bandgap reference generator, a low voltage detector LVDD, a low voltage detector LVDM, and a plurality of logic gates. In one embodiment, the masking block includes one or more level shifters, a plurality of logic gates, a D flip-flop, and a power on reset circuit (PoR). ## Claims ### Claim 1 A system comprising a power management device, said power management device comprising: a power regulator block having its input coupled to an input power supply and its outputs providing one or more regulated power supply voltages, said power regulator block is configured to be enabled or disabled by one or more control signals; and a masking block having at least one input coupled to a digital signal and its outputs coupled to said control signals. ### Claim 2 (depends on 1) The system as claimed in claim 1, wherein said power regulator block comprises one or more elements selected from a group comprising: a band gap reference generator; a low voltage detector; and a voltage regulator. ### Claim 3 (depends on 1) The system as claimed in claim 1, wherein said masking block comprises: a power on reset circuit; and one or more logic units configured to generate said control signals. ### Claim 4 (depends on 3) The system as claimed in claim 3, wherein said power on reset circuit is configured to monitor the voltage of said input power supply and to generate a reset signal when said voltage is at a desired level. ### Claim 5 (depends on 1) The system as claimed in claim 1, wherein said power management device is configured to prohibit an operation of said system until said power management device has been initialized and the supply voltage is stable. ### Claim 6 An integrated circuit comprising a power management device, said power management device comprising: a power regulator block having its input coupled to an input power supply and its outputs providing one or more regulated power supply voltages, said power regulator block capable of being enabled or disabled by one or more control signals; and a masking block having at least one input coupled to a digital signal and its outputs coupled to said control signals. ### Claim 7 (depends on 6) The integrated circuit as claimed in claim 6, wherein said power regulator block comprises one or more elements selected from a group comprising: a band gap reference generator; a low voltage detector; and a voltage regulator. ### Claim 8 (depends on 6) The integrated circuit as claimed in claim 6, wherein said masking block comprises: a power on reset circuit; and one or more logic units configured to generate said control signals. ### Claim 9 (depends on 8) The integrated circuit as claimed in claim 8, wherein said power on reset circuit is configured to monitor the voltage of said input power supply and to generate a reset signal when said voltage is at a desired level. ### Claim 10 (depends on 6) The integrated circuit as claimed in claim 6, wherein said power management device is configured to prohibit an operation of said integrated circuit until said power management device has been initialized and the supply voltage is stable. ### Claim 11 A power management device comprising: a power regulator block having its input coupled to an input power supply and its outputs providing one or more regulated power supply voltages, said power regulator block capable of being enabled or disabled by one or more control signals; and a masking block having at least one input coupled to a digital signal and its outputs coupled to said control signals. ### Claim 12 (depends on 11) The device as claimed in claim 11, wherein said power regulator block comprises one or more elements selected from a group comprising: a band gap reference generator; a low voltage detector; and a voltage regulator. ### Claim 13 (depends on 11) The device as claimed in claim 11, wherein said masking block comprises: a power on reset circuit; and one or more logic units configured to generate said control signals. ### Claim 14 (depends on 13) The device as claimed in claim 13, wherein said power on reset circuit is configured to monitor the voltage of said input power supply and to generate a reset signal when said voltage is at a desired level. ### Claim 15 (depends on 11) The device as claimed in claim 11, wherein said power management device is configured to prohibit an operation of a system until said power management device has been initialized and the supply voltage is stable. ### Claim 16 A method for providing a stable regulated supply voltage, said method comprising: monitoring an input supply voltage; and disabling said regulated supply voltage whenever said input supply voltage is less than a predetermined level. ### Claim 17 (depends on 16) The method as claimed in claim 16, further comprising providing an initial reset signal based on the voltage level of the input supply voltage. ### Claim 18 (depends on 16) The method as claimed in claim 16, further comprising generating a reset signal nREST when said input supply voltage is at or above the predetermined level. ### Claim 19 (depends on 16) The method as claimed in claim 16, wherein the input supply voltage is monitored by a power on reset circuit. ### Claim 20 (depends on 16) The method as claimed in claim 16, wherein said regulated supply voltage is disabled by one or more control signals generated by a digital logic core.