# US 2010/0164093 A1 · Heat dissipation in temperature critical device areas of semiconductor devices by heat pipes connecting to the substrate backside

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- Number: US 2010/0164093 A1
- Document ID: US20100164093A1
- Status: Published application
- Kind: A1
- Application number: 12/642,989
- Filed: 2009-12-21
- Published: 2010-07-01
- Earliest claimed: 2008-12-31
- Assignees: Globalfoundries Inc.
- Inventors: Anthony Mowry; David Farber; Fred Hause; Markus Lenski
- Web page: https://patentgrep.com/patent/US20100164093A1

## CPC

- H10W 40/73: for cooling by change of state
- H10N 19/00: Integrated devices, or assemblies of multiple devices, comprising at least one thermoelectric or thermomagnetic element covered by groups H10N10/00 - H10N15/00
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 40/228: {the projecting parts being wire-shaped or pin-shaped}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

By providing heat dissipation elements or heat pipes in temperature critical areas of a semiconductor device, enhanced performance, reliability and packing density may be achieved. The heat dissipation elements may be formed on the basis of standard manufacturing techniques and may be positioned in close proximity to individual transistor elements and/or may be used for shielding particular circuit portions.

## Claims

### Claim 1

A semiconductor device, comprising:
a substrate comprising a front side and a back side;
one or more transistor elements formed in and above a semiconductor layer that is positioned above said front side;
a metallization system formed above said semiconductor layer; and
a heat dissipation element formed adjacent to said one or more transistor elements and extending into said substrate, said heat dissipation element being electrically isolated from said one or more transistor elements and said metallization system and comprising a fill material having thermal conductivity that is higher than a thermal conductivity of said semiconductor layer.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, further comprising a buried insulating layer formed on said front side of said substrate, wherein said heat dissipation element extends through said buried insulating layer.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein said fill material comprises a metal.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein said fill material comprises a fluid.

### Claim 5 (depends on 4)

The semiconductor device of claim 4, further comprising at least one plug for confining said fluid, wherein said plug is comprised of a material that has a higher thermal conductivity compared to said semiconductor layer.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein said heat dissipation element extends to said back side.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein said heat dissipation element has a first lateral size at said semiconductor layer and has a second lateral size within said substrate and wherein said first lateral size is less than said second lateral size.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein said heat dissipation element has a first lateral size at said semiconductor layer and has a second lateral size within said substrate and wherein said first lateral size is greater than said second lateral size.

### Claim 9 (depends on 7)

The semiconductor device of claim 7, further comprising at least one further heat dissipation element formed adjacent to said one or more transistor elements, wherein said at least one further heat dissipation element is isolated from said heat dissipation element at said semiconductor layer and is in contact with said heat dissipation element within said substrate.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, further comprising a heat spreading layer formed at said back side, wherein said heat dissipation element is in contact with said heat spreading layer.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein said one or more transistor elements represent circuit elements of a speed critical logic circuit portion.

### Claim 12 (depends on 1)

The semiconductor device of claim 1, further comprising a second heat dissipation element comprising a second fill material that is in contact with said fill material of said heat dissipation element so as to form a thermocouple.

### Claim 13

A substrate for forming semiconductor devices, said substrate comprising:
a semiconductor layer positioned above a substrate material; and
a heat spreading layer in contact with said substrate material, said heat spreading layer having a thermal conductivity that is greater than a thermal conductivity of said substrate material and said semiconductor material.

### Claim 14 (depends on 13)

The substrate of claim 13, wherein said heat spreading layer comprises a metal.

### Claim 15 (depends on 13)

The substrate of claim 13, further comprising a buried insulating layer formed between said semiconductor layer and said substrate material.

### Claim 16 (depends on 13)

The substrate of claim 13, wherein said heat spreading layer is embedded in said substrate material.

### Claim 17 (depends on 13)

The substrate of claim 13, wherein said semiconductor layer and said substrate material comprise silicon.

### Claim 18

A method, comprising:
forming an opening adjacent to an active semiconductor region of a semiconductor device, said opening extending at least into a substrate material of said semiconductor device;
filling said opening with a fill material to form a heat dissipation element, said fill material having a thermal conductivity that is higher than a thermal conductivity of said substrate material; and
connecting said heat dissipation element with a heat spreading layer formed above a back side of said substrate material.

### Claim 19 (depends on 18)

The method of claim 18, further comprising forming one or more transistor elements in said active semiconductor region prior to forming said heat dissipation element.

### Claim 20 (depends on 18)

The method of claim 18, wherein forming said opening comprises etching through a portion of said active semiconductor region and forming an insulating material layer on sidewalls of said opening.

### Claim 21 (depends on 18)

The method of claim 18, wherein forming said opening comprises forming said opening so as to extend through an isolation structure laterally enclosing said active semiconductor region.

### Claim 22 (depends on 18)

The method of claim 18, wherein filling said opening comprises filling in a working fluid and depositing a material to confine said working fluid.

### Claim 23 (depends on 18)

The method of claim 18, wherein filling said opening comprises filling in a metal-comprising material by performing at least one of a chemical vapor deposition process, a physical vapor deposition process and an electrochemical deposition process.

### Claim 24 (depends on 18)

The method of claim 18, further comprising forming a second heat dissipation element so as to comprise a different fill material compared to said heat dissipation element and to form an interface between said different fill materials adjacent to said active semiconductor region.

### Claim 25 (depends on 18)

The method of claim 18, further comprising identifying a location of increased heat generation in said active semiconductor region during operation of said semiconductor device and positioning a plurality of said heat dissipation elements laterally around said location.

### Claim 26 (depends on 18)

The method of claim 18, further comprising forming a transistor element in said active region and forming said heat dissipation element laterally adjacent to said transistor element with an offset of approximately one micrometer or less.