# US 2010/0164086 A1 · Semiconductor device and manufacturing method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0164086 A1 - Document ID: US20100164086A1 - Status: Published application - Kind: A1 - Application number: 12/376,917 - Filed: 2007-08-02 - Published: 2010-07-01 - Earliest claimed: 2006-08-11 - Assignees: Sanyo Electric Co., Ltd.; Sanyo Semiconductor Co., Ltd. - Inventors: Takashi Noma; Yuichi Morita; Hiroshi Yamada; Kazuo Okada; Katsuhiko Kitagawa; Noboru Okubo; Shinzo Ishibe; Hiroyuki Shinogi - Web page: https://patentgrep.com/patent/US20100164086A1 ## CPC - H10W 90/00: Package configurations - B81B 7/007: {Interconnections between the MEMS and external electrical signals} - B81C 1/00238: {Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure} - H10W 20/0234: {comprising etching via holes that stop on pads or on electrodes} - H10W 20/0242: {comprising etching via holes from the back sides of the chips, wafers or substrates} - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10W 70/68: Shapes or dispositions thereof - H10W 72/0198: {batch processes} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 90/20: Configurations of stacked chips - H10W 90/291: {characterised by containers, encapsulations, or other housings for the stacked chips} - H10W 90/721: {of bump connectors} - H10W 90/722: {between stacked chips} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00) - B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01) ## Abstract This invention is directed to offer a package type semiconductor device that can realize a smaller size device and its manufacturing method as well as a small stacked layer type semiconductor device and its manufacturing method. A device component 1 and a pad electrode 4 electrically connected with the device component 1 are formed on a semiconductor substrate 2. A supporting member 7 is bonded to a surface of the semiconductor substrate 2 through an adhesive layer 6. There is formed a through-hole 15 in the supporting member 7 penetrating from its top surface to a back surface. Electrical connection with another device is made possible through the through-hole 15. A depressed portion 12 is formed in a partial region of the top surface of the supporting member 7. Therefore, all or a portion of another device or a component can be disposed utilizing a space in the depressed portion 12. When a stacked layer type semiconductor device is formed, stacking is made by fitting a portion of a semiconductor device 50 in an upper layer to an inside of the depressed portion 12. ## Claims ### Claim 1 A semiconductor device comprising: a semiconductor substrate comprising an electronic component formed on a top surface of the semiconductor substrate; a supporting member having a bottom surface and a top surface and bonded to the semiconductor substrate; an adhesive layer attaching the bottom surface of the supporting member to the top surface of the semiconductor substrate; and an electrode disposed on the bottom surface of the supporting member and electrically connected with the electronic component, wherein the supporting member comprises a depressed portion formed from the top surface of the supporting member. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the supporting member has a through-hole penetrating through the supporting member, and the electrode is electrically connected with an electrode of another device through the through-hole. ### Claim 3 (depends on 1) The semiconductor device of claim 1, further comprising a first conductive terminal electrically connected with the electrode and provided in the through-hole in the supporting member, wherein the first conductive terminal protrudes from the top surface of the supporting member through the through-hole. ### Claim 4 (depends on 1) The semiconductor device of claim 1, further comprising a protection layer covering the semiconductor substrate and having an opening at the electrode, and a second conductive terminal electrically connected with the electrode through the opening in the protection layer. ### Claim 5 (depends on 1) The semiconductor device of claim 1, further comprising a MEMS component or a filtering material disposed in the depressed portion of the supporting member. ### Claim 6 (depends on 1) The semiconductor device of claim 1, wherein the adhesive layer is partially formed so as to form a cavity between the semiconductor substrate and the supporting member. ### Claim 7 A semiconductor device comprising: a semiconductor substrate comprising an electronic component formed on a top surface of the semiconductor substrate; a supporting member having a bottom surface and a top surface and bonded to the semiconductor substrate; an adhesive layer attaching the bottom surface of the supporting member to the top surface of the semiconductor substrate; and an electrode disposed on the bottom surface of the supporting member and electrically connected with the electronic component; wherein the supporting member has a first through-hole connecting the top and bottom surfaces of the supporting member and provided therein with a first conductive terminal electrically connected with the electrode and a second through-hole not provided with the first conductive terminal and configured to house all or a portion of another device. ### Claim 8 (depends on 7) The semiconductor device of claim 7, further comprising a protection layer covering the semiconductor substrate and having an opening at the electrode, and a second conductive terminal electrically connected with the electrode through the opening in the protection layer. ### Claim 9 A stacked layer type semiconductor device comprising a plurality of semiconductor devices vertically stacked, comprising: a lower layer semiconductor device comprising a semiconductor substrate having an electronic component on a surface thereof and a supporting member bonded to the surface of the semiconductor substrate through an adhesive layer; and an upper layer semiconductor device disposed on the lower layer semiconductor device and comprising a semiconductor substrate having an electronic component on a surface thereof and a supporting member bonded to the surface of the semiconductor substrate of the upper layer semiconductor device through an adhesive layer, wherein the supporting member of the lower layer semiconductor device comprises a depressed portion or a through-hole formed from a top surface thereof, and all or a portion of the upper layer semiconductor device is housed in the depressed portion or the through-hole of the supporting member of the lower layer semiconductor device. ### Claim 10 (depends on 9) The stacked layer type semiconductor device of claim 9, wherein the upper layer semiconductor device excluding the supporting member is housed in the depressed portion or the through-hole of the lower layer semiconductor device. ### Claim 11 (depends on 9) The semiconductor device of claim 9, wherein the supporting member of the lower layer semiconductor device has a though-hole for connection with an electrode, and an electric connection between the lower layer semiconductor device and the upper layer semiconductor device is made through a conductive material formed in the through-hole for connection with the electrode. ### Claim 12 (depends on 11) The stacked layer type semiconductor device of claim 11, wherein the lower layer semiconductor device further comprises a protection layer covering a corresponding semiconductor substrate and having an opening at a corresponding electrode and a conductive terminal electrically connected with the corresponding electrode through the opening in the protection layer. ### Claim 13 A method of manufacturing a semiconductor device, comprising: providing a semiconductor substrate comprising an electronic component formed on a surface thereof and an electrode electrically connected with the electronic component and formed on the surface of the semiconductor substrate; bonding a supporting member to the surface of the semiconductor substrate using an adhesive; and forming a depressed portion from a top surface of the supporting member. ### Claim 14 (depends on 13) The method of claim 13, further comprising forming a through-hole in the supporting member penetrating from the top surface thereof to a back surface of the supporting member so as to expose a surface of the electrode, and forming in the through-hole a first conductive terminal electrically connected with the electrode. ### Claim 15 (depends on 13) The method of claim 13, further comprising removing the semiconductor substrate so as to expose a surface of the electrode, forming a protection film covering the semiconductor substrate and having an opening at the electrode, and forming a second conductive terminal protruding from the supporting member toward the semiconductor substrate and electrically connected with the electrode through the opening in the protection film. ### Claim 16 A method of manufacturing a stacked layer type semiconductor device, comprising: providing a lower layer semiconductor device comprising a semiconductor substrate having an electronic component formed on a surface thereof and an electrode electrically connected with the electronic component and a supporting member bonded to the surface of the lower layer semiconductor substrate through an adhesive layer; placing on the lower layer semiconductor device an upper layer semiconductor device comprising a semiconductor substrate having an electronic component formed on a surface thereof and an electrode electrically connected with the electronic component and a supporting member bonded to the surface of the upper layer semiconductor substrate through an adhesive layer, wherein a depressed portion or a through-hole is formed from a top surface of the supporting member of the lower layer semiconductor device; and all or a portion of the upper layer semiconductor device is housed in the depressed portion or the through-hole in the supporting member of the lower layer semiconductor device. ### Claim 17 (depends on 16) The method of claim 16, further comprising forming in the supporting member of the lower layer semiconductor device a through-hole for connection with the electrode penetrating from the top surface of the supporting member of the lower layer semiconductor device to a back surface of the supporting member of the lower layer semiconductor device, forming a conductive material in the through-hole for connection with the electrode, and electrically connecting the upper layer semiconductor device with the lower layer semiconductor device through the conductive material formed in the through-hole for connection with the electrode. ### Claim 18 (depends on 16) The method of claim 16, further comprising forming a protection layer covering each semiconductor substrate and a portion of a corresponding supporting member and having an opening at a corresponding electrode.