# US 2010/0164048 A1 · Method for fabricating a semiconductor substrate and semiconductor substrate

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- Number: US 2010/0164048 A1
- Document ID: US20100164048A1
- Status: Published application
- Kind: A1
- Application number: 12/644,275
- Filed: 2009-12-22
- Published: 2010-07-01
- Earliest claimed: 2008-12-24
- Assignees: S.O.I.Tec Silicon on Insulator Technologies
- Inventors: Christophe Figuet; Christophe Bouvier; Céline Cailler; Alexis Drouin; Thibaut Maurice
- Web page: https://patentgrep.com/patent/US20100164048A1

## CPC

- H10F 39/014: {of CMOS image sensors}
- H10F 71/121: {The active layers comprising only Group IV materials}
- Y02E 10/547: Monocrystalline silicon PV cells
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

The disclosure provides a method for fabricating a semiconductor substrate comprising the steps of: providing a semiconductor on insulator type substrate, providing a diffusion barrier layer and providing a second semiconductor layer. By providing the diffusion barrier layer, it becomes possible to suppress diffusion from the highly doped first semiconductor layer into the second semiconductor layer. The invention also relates to a corresponding semiconductor substrate and opto-electronic devices comprising such a substrate.

## Claims

### Claim 1

A method for fabricating a semiconductor substrate comprising:
a) providing a semiconductor on insulator substrate including a base, an insulating layer and a first semiconductor layer, wherein the first semiconductor layer has a first dopant concentration;
b) disposing a diffusion barrier layer on the substrate; and
c) disposing a second semiconductor layer on the substrate, wherein the second semiconductor layer has a second dopant concentration different from the first dopant concentration.

### Claim 2 (depends on 1)

The method of claim 1, wherein the diffusion barrier layer and the first semiconductor layer have essentially the same lattice parameter.

### Claim 3 (depends on 1)

The method of claim 1, wherein the diffusion barrier layer is a Si1-x-yGexCy layer.

### Claim 4 (depends on 3)

The method of claim 3, wherein 0≦x≦1 and 0<y≦0.04.

### Claim 5 (depends on 3)

The method of claim 3, wherein 0.03≦y≦0.04.

### Claim 6 (depends on 3)

The method of claim 3, wherein at least one of the first and second dopants include boron.

### Claim 7 (depends on 3)

The method of claim 3, wherein at least one of the first and second dopants include phosphorus.

### Claim 8 (depends on 3)

The method of claim 3, wherein x=αy, and wherein 8<α<11.

### Claim 9 (depends on 8)

The method of claim 8, wherein α=9.

### Claim 10 (depends on 1)

The method of claim 1, wherein the diffusion barrier layer has a thickness from 10 to 500 nm.

### Claim 11 (depends on 1)

The method of claim 1, wherein the diffusion barrier layer has a thickness from 20 to 50 nm.

### Claim 12 (depends on 1)

The method of claim 1, wherein the doping level of the first semiconductor layer is substantially higher than the doping level of the second semiconductor layer.

### Claim 13 (depends on 1)

The method of claim 1, wherein the doping of at least one of the first semiconductor layer and second semiconductor layer is achieved by in situ doping.

### Claim 14 (depends on 1)

The method of claim 1, wherein the doping of the first and second semiconductor layer is carried out in the same fabrication device.

### Claim 15 (depends on 1)

The method of claim 1, wherein the base includes transparent material.

### Claim 16 (depends on 1)

The method of claim 1, wherein the diffusion barrier layer is a multilayer structure having at least two layers.

### Claim 17 (depends on 1)

The method of claim 1, wherein, after fabrication, the first semiconductor layer has a thickness from 10 nm to 800 nm.

### Claim 18 (depends on 1)

The method of claim 1, wherein, after fabrication, the first semiconductor layer has a thickness from 55 nm to 200 nm.

### Claim 19 (depends on 1)

The method of claim 1, wherein, after fabrication, the second semiconductor layer has a thickness up to 10 μm.

### Claim 20 (depends on 1)

The method of claim 1, wherein, after fabrication, the insulating layer has a thickness from 10 nm to 1500 nm.

### Claim 21 (depends on 1)

The method of claim 1, wherein, after fabrication, the insulating layer has a thickness from 100 nm to 400 nm.

### Claim 22 (depends on 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11)

The method of claim 1 to 11, wherein step (a) includes:
(1) providing a donor substrate;
(2) providing an insulating layer on the donor substrate;
(3) creating a predetermined splitting area inside the donor substrate;
(4) bonding the donor substrate to a base substrate;
(5) detaching a portion of the donor substrate at the predetermined splitting area to transfer a layer of the donor substrate including the insulating layer onto the base substrate to form a semiconductor on insulator substrate; and
(6) doping at least a part of the transferred semiconductor layer.

### Claim 23 (depends on 1)

The method of claim 1, wherein the second semiconductor layer is of the same material as the first semiconductor layer.

### Claim 24 (depends on 1)

The method of claim 1, wherein the diffusion barrier layer is disposed directly on the first semiconductor layer.

### Claim 25 (depends on 1)

The method of claim 1, wherein the second semiconductor layer is disposed directly on the diffusion barrier layer.

### Claim 26 (depends on 1)

The method of claim 1, wherein the doping of the first semiconductor layer, the growth of the diffusion barrier layer and the growth of the second semiconductor layer are carried out in the same device.

### Claim 27

A semiconductor substrate comprising:
a) a base;
b) an insulating layer;
c) a first semiconductor layer with a first dopant concentration;
d) a diffusion barrier layer, and
e) a second semiconductor layer with a second dopant concentration different from the first dopant concentration.

### Claim 28 (depends on 1)

An opto-electronic sensor comprising a semiconductor substrate fabricated according to the method of claim 1.

### Claim 29 (depends on 33)

The opto-electronic sensor of claim 33, wherein the sensor is an image sensor.