# US 2010/0164044 A1 · Image sensor and manufacturing method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2010/0164044 A1 - Document ID: US20100164044A1 - Status: Published application - Kind: A1 - Application number: 12/646,594 - Filed: 2009-12-23 - Published: 2010-07-01 - Earliest claimed: 2008-12-30 - Inventors: Chang-Eun Lee - Web page: https://patentgrep.com/patent/US20100164044A1 ## CPC - H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes} - H10F 39/018: {of hybrid image sensors} - H10F 39/809: {of hybrid image sensors} - H10F 39/014: {of CMOS image sensors} - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract An image sensor includes first to fourth image sensing sections symmetrically aligned in a form of a 2×2 matrix, first to fourth pixel arrays aligned in the first to fourth image sensing sections, respectively, in adjacent to each other, and first to fourth peripheral circuit parts aligned at peripheral portions of the first to fourth image sensing sections. A middle-size CMOS image sensor is provided that is suitable for the available field size of conventional photo equipment, so the manufacturing cost may be minimized and price competitiveness may be maximized while providing high-quality images with high pixel resolution. ## Claims ### Claim 1 A device comprising: first to fourth image sensing sections symmetrically aligned in a form of a 2×2 matrix; first to fourth pixel arrays aligned in the first to fourth image sensing sections, respectively, substantially adjacent to each other; and first to fourth peripheral circuit parts aligned at peripheral portions of the first to fourth image sensing sections. ### Claim 2 (depends on 1) The device of claim 1 wherein, the second to fourth image sensing sections are formed by sequentially turning over the first image sensing section. ### Claim 3 (depends on 1) The device of claim 1 wherein, the first to fourth image sensing sections are formed on four dies, respectively, which are adjacent to each other on a wafer. ### Claim 4 A device comprising: first and second image sensing sections; first and second pixel arrays aligned adjacent to each other at a boundary between the first and second image sensing sections; and first and second peripheral circuit parts aligned at peripheral portions of the first and second image sensing sections. ### Claim 5 (depends on 4) The device of claim 4 wherein, the second image sensing section is formed by turning over the first image sensing section. ### Claim 6 (depends on 4) The device of claim 4 wherein, the first and second sensing sections are formed on two dies, respectively, which are adjacent to each other on a wafer. ### Claim 7 A method comprising: forming first to fourth masks, in which the second to fourth masks are formed by sequentially turning over the first mask; aligning the first to fourth masks on a wafer; and exposing first to fourth dies, which are substantially adjacent to each other on the wafer, through the first to fourth masks. ### Claim 8 (depends on 7) The method of claim 7, comprising scribing the first to fourth dies into one cell. ### Claim 9 (depends on 7) The method of claim 7, wherein pixel array parts aligned on the first to fourth dies, respectively, are connected to each other at boundaries of the first to fourth dies. ### Claim 10 (depends on 7) The method of claim 7, wherein first to fourth peripheral circuit parts are formed at peripheral portions of the first to fourth dies. ### Claim 11 A method comprising: preparing a mask including a first mask pattern formed over a top surface of a substrate and a second mask pattern formed over a bottom surface of the substrate; performing a first photo process on a first image sensing section by using the first mask pattern of the mask; performing a second photo process on a third image sensing section by transversely rotating the mask at an angle of about 180°; performing a third photo process on a second image sensing section by using the second mask pattern of the mask; and performing a fourth photo process on a fourth image sensing section by transversely rotating the mask at an angle of about 180°. ### Claim 12 (depends on 11) The method of claim 11, wherein the first to fourth image sensing sections are aligned in a form of a 2×2 matrix, in which pixel array parts thereof are adjacent to each other. ### Claim 13 (depends on 11) The method of claim 11, wherein first to fourth peripheral circuit parts are formed at peripheral portions of the first to fourth image sensing sections, respectively. ### Claim 14 A method comprising: forming first and second masks, in which the second mask is formed by turning over the first mask; aligning the first and second masks on a wafer; and exposing first and second dies, which are adjacent to each other on the wafer, through the first and second masks. ### Claim 15 (depends on 14) The method of claim 14, comprising scribing the first and second dies into one cell. ### Claim 16 (depends on 14) The method of claim 14, wherein pixel array parts aligned on the first and second dies, respectively, are connected to each other at a boundary of the first and second dies. ### Claim 17 (depends on 14) The method of claim 14, wherein first and second peripheral circuit parts are formed at peripheral portions of the first and second dies. ### Claim 18 A method comprising: preparing a mask including a first mask pattern formed over a top surface of a substrate and a second mask pattern formed over a bottom surface of the substrate; performing a first photo process on a first image sensing section by using the first mask pattern of the mask; and performing a second photo process on a second image sensing section by using the second mask pattern of the mask. ### Claim 19 (depends on 18) The method of claim 18, wherein pixel array parts of the first and second image sensing sections are adjacent to each other. ### Claim 20 (depends on 18) The method of claim 18, wherein first and second peripheral circuit parts are formed at peripheral portions of the first and second image sensing sections, respectively.