Flash memory controller, error correction code controller therein, and the methods and systems thereof

An error correction code (ECC) controller for a flash memory, comprising:

• an ECC encoder configured to generate first ECC data with variable length in response to information data to be stored in a flash memory;
• an ECC divider configured to divide each of the first ECC data into one or more ECC segments according to the length of the first ECC datum;
• an ECC constructor configured to generate an ECC datum by combining one or more ECC segments for each information datum read from the flash memory;
• and
• an ECC decoder configured to correct the errors of the information data read from the flash memory by using the ECC data generated by the ECC constructor.

A method for encoding error correction code (ECC) data for information data to be stored in a flash memory, comprising:

• generating an ECC datum in response to an information datum to be stored in a flash memory;
• dividing the ECC datum into one or more ECC segments;
• storing the information datum to a flash page of a flash block of the flash memory;
• and
• storing the ECC segments to a plurality of the flash pages of the flash block of the flash memory.

A method for correcting errors of information data stored in a flash memory, comprising:

• reading an information datum stored in a flash memory;
• combining one or more ECC segments stored in the flash memory into an ECC datum corresponding to the information datum;
• and
• correcting errors of the information datum by decoding the ECC codeword formed by the information datum and the ECC datum.