Rapid memory buffer write storage system and method
AssigneeSpansion LLC
InventorsFrank EDELHAEUSER, Clifford A. ZITLAW, Jeremy MAH
Life of this patent
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Abstract
Efficient and convenient storage systems and methods are presented. In one embodiment a storage system includes a host for processing information, a memory controller and a memory. The memory controller controls communication of the information between the host and the memory, wherein the memory controller routes data rapidly to a buffer of the memory without buffering in the memory controller. The memory stores the information. The memory includes a buffer for temporarily storing the data while corresponding address information is determined.
Claims20
A memory write method comprising:
- issuing a first program command to a memory;
- loading data into a buffer of said memory;
- loading the target row address after said data is loaded in said buffer of said memory;
- and
- issuing a program confirm command.
A memory system comprising:
- a host for processing information;
- a memory for storing said information, including a memory array for storing information and a buffer for temporarily storing information before the information is forwarded to the memory array;
- and
- a memory controller for controlling communication of said information between said host and said memory, wherein said memory control routes data rapidly to the buffer of said memory without buffering in said memory controller during the complete determination of corresponding address information.
17 A memory alteration method comprising:
- receiving an indication to write data to a cell;
- storing data rapidly in a buffer of the memory;
- determining memory cell identification or address information, wherein a portion of the memory cell address information is determined while the data is stored in the buffer of the memory.
A memory alteration method of claim 17 wherein the portion of the memory cell address information determined while the data is stored in the buffer of the memory is a row address.
A memory alteration method of claim 17 wherein a page buffer in the memory temporarily stores the data until the address value of the physical block address (PBA) is determined.
A memory alteration method of claim 17 further comprising flushing the data from the page buffer into a memory array.
Dependencies are inferred from the claim text.