Cache memory device, control method for cache memory device, and image processing apparatus

A control method for a cache memory device comprising a memory section, the method comprising:

• storing image data of a frame in the memory section with a predetermined size as one cache block;
• converting a memory address of the image data such that a plurality of different indices are assigned in units of the predetermined size in horizontal direction in the frame so as to generate address data;
• and
• outputting the image data from the memory section as output data by specifying a tag, an index, and a block address based on the address data generated through conversion.

An image processing apparatus, comprising:

• a cache memory device, comprising a memory section configured to store image data of a frame with a predetermined size as one cache block;
• and an address conversion section configured to convert a memory address of the image data such that a plurality of different indices are assigned in units of the predetermined size in horizontal direction in the frame so as to generate address data, wherein the image data is output from the memory section as output data by specifying a tag, an index, and a block address based on the address data generated by the address conversion section through conversion;
• a main memory capable of storing the image data of the frame;
• and
• an image processing section configured to read the image data from the main memory via the cache memory device and perform image processing on the image data.