Methods and apparatus for low-voltage bias current and bias voltage generation

A low-voltage bias current generation circuit comprising:

• a first n-type metal-oxide-semiconductor field-effect transistor (MOSFET) biased to generate a first current at the drain of the first n-type MOSFET and a second current through a resistor electrically coupled with a gate of the first n-type MOSFET;
• a first p-type MOSFET having a drain electrically coupled with the resistor to provide a third current at the drain of the first p-type MOSFET;
• a second n-type MOSFET having a drain and a gate that are electrically coupled with the drain of the first p-type MOSFET, the second n-type MOSFET further having a source that is electrically coupled with the circuit ground, the second n-type MOSFET configured to reduce an impedance of the first p-type MOSFET;
• and
• a second p-type MOSFET electrically coupled with the first n-type MOSFET via a current mirror circuit, the second p-type MOSFET also having a drain electrically coupled with the drain and the gate of the second n-type MOSFET, the second p-type MOSFET configured to provide a fourth current to the second n-type MOSFET substantially equal to the first current at the drain of the first n-type MOSFET and to cause the second current through the resistor to be substantially equal to the third current at the drain of the first p-type MOSFET, the third current at the drain of the first p-type MOSFET corresponding to a bias current output by the low-voltage bias current generation circuit.

A low-voltage bandgap voltage generation circuit comprising:

• a first p-type MOSFET configured to provide a proportional-to-absolute-temperature (PTAT) current to a first diode circuit electrically coupled thereto;
• a second p-type MOSFET having a source electrically coupled with a source of the first p-type MOSFET and a drain electrically coupled with a drain of the second p-type MOSFET via a differential amplifier circuit configured to generate a complementary-to-absolute-temperature (CTAT) current at the drain of the second p-type MOSFET;
• a third p-type MOSFET electrically coupled with the second p-type MOSFET and the first p-type MOSFET, the third p-type MOSFET configured to combine a first current substantially equal to the CTAT current provided by the second p-type MOSFET and a second current substantially equal to the PTAT current provided by the first p-type MOSFET to drive a resistor coupled thereto to produce an output bandgap voltage;
• a second diode circuit having an anode electrically coupled with the drain of the second p-type MOSFET and a cathode electrically coupled with a circuit ground, the second diode circuit configured to reduce an impedance of the second p-type MOSFET;
• and
• a fourth p-type MOSFET electrically coupled with the second diode circuit and configured to provide a third current substantially equal to the PTAT current to the second diode circuit and to reduce a fourth current drawn by the second diode circuit from the drain of the second p-type MOSFET to a substantially zero value.

A method to generate an electrical bias signal, the method comprising:

• generating the electrical bias signal using a first amplifier stage and a second amplifier stage, the second amplifier stage providing the electrical bias signal;
• reducing an impedance of the second amplifier stage using a low impedance circuit electrically coupled with the second amplifier stage;
• and
• reducing an offset in the electrical bias signal caused by the low impedance circuit using a current source electrically coupled with the low impedance circuit, the current source configured to drive the low impedance circuit to reduce loading of the second amplifier stage by the low impedance circuit.