Method of packaging integrated circuit dies with thermal dissipation capability
AssigneeFreescale Semiconductor, Inc.
InventorsLiyu Yang, Scott M. Hayes, Lizabeth Ann A. Keser, George R. Leal
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AssigneeFreescale Semiconductor, Inc.
InventorsLiyu Yang, Scott M. Hayes, Lizabeth Ann A. Keser, George R. Leal
Estimating the term…
A method (20) of packaging integrated circuit dies (70) includes obtaining (22) a heat spreader substrate (24) having a top surface (38) with cavities (30) formed therein, each of the cavities (30) having a cavity floor (44). A surface (74) of each die (70) is attached (66) to one of the cavity floors (44) such that a surface (72) of each die (70) and the top surface (38) of the substrate (24) are coplanar. Build-up layers (88) with electrical interconnects (97) are formed (86) over the surface (72) of each die (80) and the surface (38) of the substrate (24) to form a panel (68) of IC dies (70). Following formation of the build-up layers (88), the panel (68) is separated (108) into multiple integrated circuit packages (28), each including electrical interconnects (97), a die (70), and the substrate (24) for dissipating heat away from the die (70) during operation.
A method of packaging an integrated circuit (IC) die with thermal dissipation capability, said IC die having a first surface and a second surface, and said method comprising:
An integrated circuit (IC) package comprising:
A method of packaging multiple integrated circuit (IC) dies with thermal dissipation capability, each of said multiple IC dies having a first surface and a second surface, and said method comprising:
Dependencies are inferred from the claim text.