Chip scale package structure with can attachment
AssigneeSTMicroelectronics S.r.l.
InventorsKim-Yong Goh, Jing-En Luan
Life of this patent
Estimating the term…
Abstract
A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test.
Claims25
A chip scale package (CSP) device, comprising:
- a CSP having a semiconductor die electrically coupled to a plurality of solder balls;
- and
- a can having an inside top surface and one or more side walls defining a chamber, the CSP being housed in the chamber and being attached to the inside top surface of the can.
A chip scale package (CSP) device, comprising:
- a CSP having a semiconductor die on which a layer of metal is formed;
- a plurality of solder balls attached to the layer of metal, the semiconductor die being electrically coupled to the solder balls;
- and
- a can having an inside top surface and one or more side walls defining a chamber, the CSP being rigidly attached to the inside top surface and being housed in the chamber.
A chip scale package (CSP) device, comprising:
- a plurality of CSPs each having a semiconductor die electrically coupled to a plurality of solder balls;
- and
- a can having an inside top surface and one or more side walls, the can having one or more interior walls defining a plurality of chambers, each CSP being housed in a respective chamber and being attached to the inside top surface.
A semiconductor device, comprising:
- a semiconductor die electrically coupled to a plurality of solder balls, the semiconductor die being encapsulated in an encapsulating compound;
- and
- a can having an inside top surface and one or more side walls defining a chamber, the encapsulated semiconductor die being housed in the chamber and being attached to the inside top surface of the can.
A method for manufacturing a chip scale package (CSP) device, comprising:
- forming a frame having a plurality of spaced apart chambers each sized to house a CSP;
- attaching a respective CSP to each of the chambers;
- and
- cutting the frame containing the plurality of CSPs into a plurality of CSP devices, each CSP device having a CSP capped with a can.
Dependencies are inferred from the claim text.