Semiconductor package, method of manufacturing same, semiconductor device and electronic device
AssigneeNEC Corporation
InventorsNobuhiro Mikami, Shinji Watanabe, Junya Sato, Atsumasa Sawada
Life of this patent
Estimating the term…
Loading patent…
AssigneeNEC Corporation
InventorsNobuhiro Mikami, Shinji Watanabe, Junya Sato, Atsumasa Sawada
Estimating the term…
A highly reliable semiconductor package in which faulty connections do not occur even when an external substrate is curved. The semiconductor package includes a semiconductor chip 1; an interposer substrate 10 arranged so as to enclose the semiconductor chip and having a first electrode pad 14, which is for connecting to an electrode of the semiconductor chip, provided on a wiring layer 12 disposed between insulating layers 11, 13; and a first conductor 2 for connecting the electrode of the semiconductor chip and the electrode pad. A portion of the underside of the interposer substrate 10 is adhered to the interposer substrate 10. A gap 4 is provided between the semiconductor chip 1 and the interposer substrate 10 on the side surface of the semiconductor chip 1. When a substrate 20 on which the semiconductor package has been mounted is made to curve, the gap 4 is arranged at least on the underside of the semiconductor chip 1 and a state is attained in which the interposer substrate 10 departs from the underside of the semiconductor chip 1.
A semiconductor package comprising:
A method of manufacturing a semiconductor package characterized by comprising:
(canceled)
Dependencies are inferred from the claim text.