US 2010/0148293 A1Published application

Miniaturized implantable sensor platform having multiple devices and sub-chips

OwnerFaquir Chand Jain, Fotios Papadimitrakopulosinventors

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Abstract

An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component.

Claims38

Dependent claims

A device platform, which contains at least one internal component, wherein the device platform is configured to isolate the at least one internal component from an environment external to the device platform while providing for electrical connectivity to at least one external component externally located on the outer surface of the said device platform, the device comprising:

an enclosure, said enclosure including a top cover plate and a bottom substrate configured to define a sealed enclosure cavity for containing the at least one component,
wherein said top cover plate is configured to allow reception and transmission of electromagnetic radiation, the surface of said top cover plate adjacent said enclosure cavity being covered with an epitaxial Si film in intimate cohesion, and
wherein said bottom substrate is constructed of a high resistivity Si having a Si substrate material conductivity and includes at least one partial Si via (PSV), wherein said at least one partial Si via (PSV) is configured to electrically connect said at least one internal component with said at least one external component, and
wherein said partial Si via (PSV) is formed by introducing a dopant with said Si material, wherein the combination of said dopant and said Si material results in at least one of a reduced conductivity and a conductivity that is opposite to that of said Si substrate material conductivity, and
wherein an outer perimeter of each of said surface of said top cover plate adjacent said enclosure cavity and a surface of said bottom substrate adjacent said enclosure cavity includes a continuous gold fence cohesively bonded to its respective Si surface, wherein said top cover plate and said bottom substrate are configured such that said enclosure cavity is sealed using a gold-to-gold bond.

2 more elements

A method for integrating a plurality of device into a device platform, the method comprising:

forming the device platform using a top cover plate and a bottom substrate separated by at least one Si spacer, wherein said device platform defines a device cavity and said top cover plate is configured to allow electromagnetic radiation to be transmitted through said top cover plate, wherein a portion of said top cover plate includes an epitaxial Si film constructed from at least one of Si-on-Sapphire and Si-on-Quartz;
patterning and depositing a gold film on said epitaxial Si film to create a Si—Au eutectic perimeter fence, at least one interconnect, at least one contact pad and at least one mounting pad for securing and interconnecting at least one internal component located within said device cavity, said at least one internal component including at least one of a photovoltaic cell and a photodetector, wherein said bottom substrate is constructed of a high resistivity Si substrate material,
wherein said bottom substrate includes a signal processing device and a light emitting diode serving as an optical transmitter, wherein said bottom substrate includes bonding pads and interconnects deposited on a patterned insulating layer of grown or deposited oxide,
wherein said bottom substrate has a plurality of partial Si vias (PSV) for electrically connecting at least one of said internal components with at least one device located on an outer surface of the bottom substrate,
wherein said plurality of partial Si vias (PSVs) are electrically isolated from each other and are formed by introducing a dopant having an opposite conductivity to that of said high resistivity Si substrate,
wherein said bottom substrate hosts a plurality of bottom substrate pads and said cover plate host a plurality of cover plate pads, wherein said bottom substrate pads and said cover plate pads are aligned with each other and include gold bumps of varying height to permit connectivity between components located on the cover plate and said signal processing device and said light emitting diode,
wherein the Si side of said cover plate, top and bottom surfaces of said at least one Si spacer and a top side of said bottom substrate are deposited with a continuous gold fence on an outer perimeter, wherein one side of said gold fence is bonded to a Si surface forming a gold-Si eutectic mixture and wherein an opposing side of said gold fence is bonded to a like gold fence using a gold-to-gold bond to seal said device platform.

4 more elements

A miniaturized device platform, the miniaturized device platform comprising:

a first substrate and a second substrate configured to form an enclosure, said second substrate being constructed from a high-resistivity semiconductor material, wherein the miniaturized device platform is immersed in a corrosive and high temperature external environment, said enclosure housing a plurality of internal components and being configured to isolate said plurality of components from said external environment, said miniaturized device platform configured to allow reception and transmission of electromagnetic radiation through at least one of said first substrate and said second substrate, wherein said enclosure includes a plurality of partial-semiconductor-vias (PSVs) configured to electrically connect at least one of said plurality of internal components with an external component, wherein said partial-semiconductor-vias (PSemVs) are constructed on a thinned section of said second substrate and are created by introducing an impurity to said second substrate, the combination of said second substrate and said impurity configured to provide electrical conductivity, wherein said first substrate and said second substrate are cohesively sealed using a combination of at least one of an epitaxial interface, a eutectic mixture, a metal silicide, and a metal to metal bond.

Dependencies are inferred from the claim text.

Facts

Application: 12/590,883Filed 16 Nov 2009
Priority: 14 Nov 2008
Published: 17 Jun 2010
Term ends: Not estimatedThe source records don’t support an estimate.

Classification19 codes

A61B 5/6846
Arrangements of detecting, measuring or recording means, e.g. sensors, in relation to patient: specially adapted to be brought in contact with an…
A61B 5/0017
Characterised by features of the telemetry system: transmitting optical signals
A61B 5/1473
Using chemical or electrochemical methods, e.g. by polarographic means: invasive, e.g. introduced into the body by a catheter
H10F 19/80
Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic…