Semiconductor device and method for manufacturing same
AssigneeSony Corporation
InventorsKaori Tai, Masanori Tsukamoto, Masashi Nakata, Itaru Oshiyama
Life of this patent
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Abstract
A semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the device having: a first insulating layer and a second insulating layer; and gate electrode contact plugs. Each of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the first insulating layer.
Claims8
A semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor and being provided with an insulating layer, wherein
- each of gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the insulating layer,
- the gate electrode of the N-channel insulated gate field effect transistor is composed of a first conductive material,
- the gate electrode of the P-channel insulated gate field effect transistor is composed of a second conductive material different from the first conductive material, and
- interconnect layers are formed to each cover a whole top surface of a respective one of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor.
A method for manufacturing a semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the method comprising the steps of:
- preparing a base that includes channel forming regions and source/drain regions of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor, an insulating layer, gate electrode formation openings provided in the insulating layer for the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor, and a gate insulating film provided at least on bottoms of the gate electrode formation openings;
- forming a gate electrode composed of a first conductive material in the gate electrode formation opening for the N-channel insulated gate field effect transistor, and
- forming a gate electrode composed of a second conductive material different from the first conductive material in the gate electrode formation opening for the P-channel insulated gate field effect transistor;
- and
- forming interconnect layers that each cover a whole top surface of a respective one of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor.
Dependencies are inferred from the claim text.