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AssigneeInternational Business Machines Corporation
InventorsThomas W. Dyer, Zhijiong Luo, Haining S. Yang
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An improved semiconductor-on-insulator (SOI) substrate is provided, which contains a patterned buried insulator layer at varying depths. Specifically, the SOI substrate has a substantially planar upper surface and comprises: (1) first regions that do not contain any buried insulator, (2) second regions that contain first portions of the patterned buried insulator layer at a first depth (i.e., measured from the planar upper surface of the SOI substrate), and (3) third regions that contain second portions of the patterned buried insulator layer at a second depth, where the first depth is larger than the second depth. One or more field effect transistors (FETs) can be formed in the SOI substrate. For example, the FETs may comprise: channel regions in the first regions of the SOI substrate, source and drain regions in the second regions of the SOI substrate, and source/drain extension regions in the third regions of the SOI substrate.
A semiconductor-on-insulator (SOI) substrate having a substantially planar upper surface with a patterned buried insulator layer located therein, wherein the SOI substrate comprises first regions that do not contain any buried insulator, second regions that contain first portions of the patterned buried insulator layer at a first depth from the substantially planar upper surface, and third regions that contain second portions of the patterned buried insulator layer at a second depth from the substantially planar upper surface, and wherein the first depth is larger than the second depth.
A semiconductor device comprises one or more field effect transistors (FETs), wherein said one or more FETs comprise:
Dependencies are inferred from the claim text.