Nanocrystal silicon layer structures formed using plasma deposition technique, methods of forming the same, nonvolatile memory devices having the nanocrystal silicon layer structures, and methods of fabricating the nonvolatile memory devices

A method of fabricating a nonvolatile memory device, comprising:

• forming a buffer layer on a substrate;
• forming a nanocrystal silicon layer on the buffer layer by a plasma deposition technique using Si-containing gas and H2-containing gas;
• forming a gate pattern on the nanocrystal silicon layer;
• and
• defining a portion of the nanocrystal silicon layer disposed under the gate pattern as a channel region, and forming a source region and a drain region by performing an ion implantation process on the remaining portion of the nanocrystal silicon layer disposed outside the channel region using the gate pattern as a mask.

A method of fabricating a nonvolatile memory device, comprising:

• forming a gate electrode on a substrate;
• forming a multilayered insulating layer on the substrate having the gate electrode;
• forming a first nanocrystal silicon layer on the multilayered insulating layer by a plasma deposition technique using Si-containing gas and H2-containing gas;
• forming a metal electrode layer on the first nanocrystal silicon layer;
• and
• forming a source electrode and a drain electrode by patterning the metal electrode layer.

A nonvolatile memory device comprising:

• a buffer layer disposed on a substrate;
• a nanocrystal silicon layer formed on the buffer layer by a plasma deposition technique using Si-containing gas and H2-containing gas;
• a gate pattern disposed on the nanocrystal silicon layer;
• and
• a source region and a drain region defining a portion of the nanocrystal silicon layer disposed under the gate pattern as a channel region, and doped with impurity ions in the remaining portion of the nanocrystal silicon layer disposed outside the channel region.

A nonvolatile memory device comprising:

• a buffer layer disposed on a substrate;
• a gate electrode disposed on the buffer layer;
• a multilayered insulating layer disposed on the substrate to cover the gate electrode;
• a first nanocrystal silicon layer formed on the multilayered insulating layer by a plasma deposition technique using Si-containing gas and H2-containing gas;
• and
• a source electrode and a drain electrode disposed apart from each other on the first nanocrystal silicon layer to expose a portion of the first nanocrystal silicon layer disposed over the gate electrode.