Burst termination control circuit and semiconductor memory device using the same cross-references to related application
AssigneeHynix Semiconductor Inc.
InventorYin Jae Lee
Life of this patent
Estimating the term…
Abstract
A burst termination control circuit includes: a pull-up unit for pulling up a first node in response to a burst termination signal, a latch unit for latching a signal of the first node, a buffer for generating a first termination control signal for stopping data output operation by buffering an output signal of the latch unit, and a logic unit for generating a second termination control signal for stopping burst operation and generation of an output enable signal in response to an output signal of the latch unit.
Claims17
A burst termination control circuit, comprising:
- a pull-up unit for pulling up a first node in response to a burst termination signal;
- a latch unit for latching a signal of the first node;
- a buffer for generating a first termination control signal for stopping data output operation by buffering an output signal of the latch unit;
- and
- a logic unit for generating a second termination control signal for stopping burst operation and generation of an output enable signal in response to the output signal of the latch unit.
A semiconductor memory device, comprising:
- a burst termination control unit for generating first and second termination control signals in response to a burst termination signal;
- a data output control unit for stopping a data output operation in response to the first termination control signal;
- a burst length control unit for stopping a burst operation according to a set burst length, in response to the second termination control signal;
- and
- a column access control unit for generating an enable signal for performing column access operation, wherein the enable signal is disabled in response to the second termination control signal.
A semiconductor memory device, comprising:
- a burst termination control unit for generating a termination control signal in response to a burst termination signal;
- a data output control unit for stopping a data output operation in response to the termination control signal;
- a burst length control unit for stopping a burst operation according to a set burst length, in response to the termination control signal;
- and
- a column access control unit for generating an enable signal for performing column access operation, wherein the enable signal is disabled in response to the termination control signal.
Dependencies are inferred from the claim text.