Semiconductor Memory Device And Methods Of Performing A Stress Test On The Semiconductor Memory Device

A method of performing a stress test on a semiconductor memory device, comprising:

• transitioning the semiconductor memory device from normal mode to a stress mode;
• applying a stress voltage to one or more word lines of the semiconductor memory device during the stress mode;
• and
• enabling, during the stress mode, a precharge circuit to provide a precharge voltage to a bit line of the semiconductor memory device.

An apparatus for performing a stress test on a semiconductor memory device, comprising:

• means for transitioning the semiconductor memory device from normal mode to a stress mode;
• means for switching a timing signal that controls an internal timing of the semiconductor memory device from an internal signal to an external signal;
• and
• means for applying a stress voltage to one or more word lines of the semiconductor memory device during the stress mode, wherein a duration of the stress mode is based upon the external signal.

An apparatus for performing a stress test on a semiconductor memory device, comprising:

• means for transitioning the semiconductor memory device from normal mode to a stress mode;
• means for applying a stress voltage to one or more word lines of the semiconductor memory device during the stress mode;
• and
• means for enabling, during the stress mode, a precharge circuit to provide a precharge voltage to a bit line of the semiconductor memory device.